Message ID | 20220830020824.62288-3-samuel@sholland.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | DMA binding for Allwinner V536/newer I2C | expand |
Dne torek, 30. avgust 2022 ob 04:08:23 CEST je Samuel Holland napisal(a): > From: Yangtao Li <frank@allwinnertech.com> > > The A100 SoC has a DMA controller that supports 8 DMA channels > to and from various peripherals. > > Add a device node for it. > > Signed-off-by: Yangtao Li <frank@allwinnertech.com> > Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Best regards, Jernej
Dne torek, 06. september 2022 ob 23:09:38 CEST je Jernej Škrabec napisal(a): > Dne torek, 30. avgust 2022 ob 04:08:23 CEST je Samuel Holland napisal(a): > > From: Yangtao Li <frank@allwinnertech.com> > > > > The A100 SoC has a DMA controller that supports 8 DMA channels > > to and from various peripherals. > > > > Add a device node for it. > > > > Signed-off-by: Yangtao Li <frank@allwinnertech.com> > > Signed-off-by: Samuel Holland <samuel@sholland.org> > > Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Applied, thanks! Best regards, Jernej
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index 548539c93ab0..5453a3bb7d81 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -101,6 +101,18 @@ ccu: clock@3001000 { #reset-cells = <1>; }; + dma: dma-controller@3002000 { + compatible = "allwinner,sun50i-a100-dma"; + reg = <0x03002000 0x1000>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>; + clock-names = "bus", "mbus"; + resets = <&ccu RST_BUS_DMA>; + dma-channels = <8>; + dma-requests = <52>; + #dma-cells = <1>; + }; + gic: interrupt-controller@3021000 { compatible = "arm,gic-400"; reg = <0x03021000 0x1000>, <0x03022000 0x2000>,