diff mbox series

[11/11] hw/ppc/e500: Add Freescale eSDHC to e500 boards

Message ID 20220915152520.21948-12-shentey@gmail.com (mailing list archive)
State New, archived
Headers show
Series ppc/e500: Add support for two types of flash, cleanup | expand

Commit Message

Bernhard Beschow Sept. 15, 2022, 3:25 p.m. UTC 
Adds missing functionality to emulated e500 SOCs which increases the
chance of given "real" firmware images to access SD cards.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
---
 docs/system/ppc/ppce500.rst | 13 +++++++++++++
 hw/ppc/Kconfig              |  1 +
 hw/ppc/e500.c               | 32 ++++++++++++++++++++++++++++++++
 3 files changed, 46 insertions(+)

Comments

Bin Meng Sept. 16, 2022, 3:26 p.m. UTC | #1 
On Thu, Sep 15, 2022 at 11:30 PM Bernhard Beschow <shentey@gmail.com> wrote:
>
> Adds missing functionality to emulated e500 SOCs which increases the
> chance of given "real" firmware images to access SD cards.

By "firmware" do you mean U-Boot?

>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
>  docs/system/ppc/ppce500.rst | 13 +++++++++++++
>  hw/ppc/Kconfig              |  1 +
>  hw/ppc/e500.c               | 32 ++++++++++++++++++++++++++++++++
>  3 files changed, 46 insertions(+)
>
> diff --git a/docs/system/ppc/ppce500.rst b/docs/system/ppc/ppce500.rst
> index c3f55c6f3d..50b199c8f3 100644
> --- a/docs/system/ppc/ppce500.rst
> +++ b/docs/system/ppc/ppce500.rst
> @@ -19,6 +19,7 @@ The ``ppce500`` machine supports the following devices:
>  * Power-off functionality via one GPIO pin
>  * 1 Freescale MPC8xxx PCI host controller
>  * VirtIO devices via PCI bus
> +* 1 Freescale Enhanced Secure Digital Host controller (eSDHC)
>  * 1 Freescale Enhanced Triple Speed Ethernet controller (eTSEC)
>
>  Hardware configuration information
> @@ -131,6 +132,18 @@ be used as follows:
>        -drive if=pflash,file=/path/to/rootfs.ext2,format=raw \
>        -append "rootwait root=/dev/mtdblock0"
>
> +Alternatively, the root file system can also reside on an emulated SD card
> +whose size must again be a power of two:
> +
> +.. code-block:: bash
> +
> +  $ qemu-system-ppc64 -M ppce500 -cpu e500mc -smp 4 -m 2G \

qemu-system-ppc{64|32}

> +      -display none -serial stdio \
> +      -kernel vmlinux \
> +      -device sd-card,drive=mydrive \
> +      -drive id=mydrive,if=none,file=/path/to/rootfs.ext2,format=raw \
> +      -append "rootwait root=/dev/mmcblk0"
> +
>  Running U-Boot
>  --------------
>
> diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
> index 769a1ead1c..6e31f568ba 100644
> --- a/hw/ppc/Kconfig
> +++ b/hw/ppc/Kconfig
> @@ -129,6 +129,7 @@ config E500
>      select PFLASH_CFI01
>      select PLATFORM_BUS
>      select PPCE500_PCI
> +    select SDHCI
>      select SERIAL
>      select MPC_I2C
>      select FDT_PPC
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index 7843a4e04b..87a03fd4a9 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -48,6 +48,7 @@
>  #include "hw/net/fsl_etsec/etsec.h"
>  #include "hw/i2c/i2c.h"
>  #include "hw/irq.h"
> +#include "hw/sd/sdhci.h"
>
>  #define EPAPR_MAGIC                (0x45504150)
>  #define DTC_LOAD_PAD               0x1800000
> @@ -66,11 +67,14 @@
>  #define MPC8544_SERIAL1_REGS_OFFSET 0x4600ULL
>  #define MPC8544_PCI_REGS_OFFSET    0x8000ULL
>  #define MPC8544_PCI_REGS_SIZE      0x1000ULL
> +#define MPC85XX_ESDHC_REGS_OFFSET  0x2e000ULL
> +#define MPC85XX_ESDHC_REGS_SIZE    0x1000ULL
>  #define MPC8544_UTIL_OFFSET        0xe0000ULL
>  #define MPC8XXX_GPIO_OFFSET        0x000FF000ULL
>  #define MPC8544_I2C_REGS_OFFSET    0x3000ULL
>  #define MPC8XXX_GPIO_IRQ           47
>  #define MPC8544_I2C_IRQ            43
> +#define MPC85XX_ESDHC_IRQ          72
>  #define RTC_REGS_OFFSET            0x68
>
>  #define PLATFORM_CLK_FREQ_HZ       (400 * 1000 * 1000)
> @@ -203,6 +207,25 @@ static void dt_i2c_create(void *fdt, const char *soc, const char *mpic,
>      g_free(i2c);
>  }
>
> +static void dt_sdhc_create(void *fdt, const char *parent, const char *mpic)
> +{
> +    hwaddr mmio = MPC85XX_ESDHC_REGS_OFFSET;
> +    hwaddr size = MPC85XX_ESDHC_REGS_SIZE;
> +    int irq = MPC85XX_ESDHC_IRQ;
> +    char *name;
> +
> +    name = g_strdup_printf("%s/sdhc@%" PRIx64, parent, mmio);
> +    qemu_fdt_add_subnode(fdt, name);
> +    /* qemu_fdt_setprop_cells(fdt, name, "voltage-ranges", 3300, 3300); */

Drop it if it is useless

> +    qemu_fdt_setprop_cells(fdt, name, "clock-frequency", 167000000);

Is this an arbitrary frequency?

> +    qemu_fdt_setprop(fdt, name, "sdhci,auto-cmd12", NULL, 0);
> +    qemu_fdt_setprop_phandle(fdt, name, "interrupt-parent", mpic);
> +    qemu_fdt_setprop_cells(fdt, name, "bus-width", 4);
> +    qemu_fdt_setprop_cells(fdt, name, "interrupts", irq, 0x2);
> +    qemu_fdt_setprop_cells(fdt, name, "reg", mmio, size);
> +    qemu_fdt_setprop_string(fdt, name, "compatible", "fsl,esdhc");
> +    g_free(name);
> +}
>
>  typedef struct PlatformDevtreeData {
>      void *fdt;
> @@ -556,6 +579,8 @@ static int ppce500_load_device_tree(PPCE500MachineState *pms,
>
>      dt_rtc_create(fdt, "i2c", "rtc");
>
> +    /* sdhc */
> +    dt_sdhc_create(fdt, soc, mpic);
>
>      gutil = g_strdup_printf("%s/global-utilities@%llx", soc,
>                              MPC8544_UTIL_OFFSET);
> @@ -996,6 +1021,13 @@ void ppce500_init(MachineState *machine)
>      i2c_slave_create_simple(i2c, "ds1338", RTC_REGS_OFFSET);
>
>

nits: use one line for the separation

> +    /* eSDHC */
> +    dev = qdev_new(TYPE_FSL_ESDHC);
> +    s = SYS_BUS_DEVICE(dev);
> +    sysbus_realize_and_unref(s, &error_fatal);
> +    sysbus_mmio_map(s, 0, pmc->ccsrbar_base + MPC85XX_ESDHC_REGS_OFFSET);
> +    sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC85XX_ESDHC_IRQ));
> +
>      /* General Utility device */
>      dev = qdev_new("mpc8544-guts");
>      s = SYS_BUS_DEVICE(dev);
> --

Regards,
Bin
Bernhard Beschow Sept. 16, 2022, 4:15 p.m. UTC | #2 
On Fri, Sep 16, 2022 at 5:26 PM Bin Meng <bmeng.cn@gmail.com> wrote:

> On Thu, Sep 15, 2022 at 11:30 PM Bernhard Beschow <shentey@gmail.com>
> wrote:
> >
> > Adds missing functionality to emulated e500 SOCs which increases the
> > chance of given "real" firmware images to access SD cards.
>
> By "firmware" do you mean U-Boot?
>

No, I mean a proprietary flash blob including partitions for the kernel,
root fs, U-Boot, etc.

>
> > Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> > ---
> >  docs/system/ppc/ppce500.rst | 13 +++++++++++++
> >  hw/ppc/Kconfig              |  1 +
> >  hw/ppc/e500.c               | 32 ++++++++++++++++++++++++++++++++
> >  3 files changed, 46 insertions(+)
> >
> > diff --git a/docs/system/ppc/ppce500.rst b/docs/system/ppc/ppce500.rst
> > index c3f55c6f3d..50b199c8f3 100644
> > --- a/docs/system/ppc/ppce500.rst
> > +++ b/docs/system/ppc/ppce500.rst
> > @@ -19,6 +19,7 @@ The ``ppce500`` machine supports the following devices:
> >  * Power-off functionality via one GPIO pin
> >  * 1 Freescale MPC8xxx PCI host controller
> >  * VirtIO devices via PCI bus
> > +* 1 Freescale Enhanced Secure Digital Host controller (eSDHC)
> >  * 1 Freescale Enhanced Triple Speed Ethernet controller (eTSEC)
> >
> >  Hardware configuration information
> > @@ -131,6 +132,18 @@ be used as follows:
> >        -drive if=pflash,file=/path/to/rootfs.ext2,format=raw \
> >        -append "rootwait root=/dev/mtdblock0"
> >
> > +Alternatively, the root file system can also reside on an emulated SD
> card
> > +whose size must again be a power of two:
> > +
> > +.. code-block:: bash
> > +
> > +  $ qemu-system-ppc64 -M ppce500 -cpu e500mc -smp 4 -m 2G \
>
> qemu-system-ppc{64|32}
>

Will fix.


> > +      -display none -serial stdio \
> > +      -kernel vmlinux \
> > +      -device sd-card,drive=mydrive \
> > +      -drive id=mydrive,if=none,file=/path/to/rootfs.ext2,format=raw \
> > +      -append "rootwait root=/dev/mmcblk0"
> > +
> >  Running U-Boot
> >  --------------
> >
> > diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
> > index 769a1ead1c..6e31f568ba 100644
> > --- a/hw/ppc/Kconfig
> > +++ b/hw/ppc/Kconfig
> > @@ -129,6 +129,7 @@ config E500
> >      select PFLASH_CFI01
> >      select PLATFORM_BUS
> >      select PPCE500_PCI
> > +    select SDHCI
> >      select SERIAL
> >      select MPC_I2C
> >      select FDT_PPC
> > diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> > index 7843a4e04b..87a03fd4a9 100644
> > --- a/hw/ppc/e500.c
> > +++ b/hw/ppc/e500.c
> > @@ -48,6 +48,7 @@
> >  #include "hw/net/fsl_etsec/etsec.h"
> >  #include "hw/i2c/i2c.h"
> >  #include "hw/irq.h"
> > +#include "hw/sd/sdhci.h"
> >
> >  #define EPAPR_MAGIC                (0x45504150)
> >  #define DTC_LOAD_PAD               0x1800000
> > @@ -66,11 +67,14 @@
> >  #define MPC8544_SERIAL1_REGS_OFFSET 0x4600ULL
> >  #define MPC8544_PCI_REGS_OFFSET    0x8000ULL
> >  #define MPC8544_PCI_REGS_SIZE      0x1000ULL
> > +#define MPC85XX_ESDHC_REGS_OFFSET  0x2e000ULL
> > +#define MPC85XX_ESDHC_REGS_SIZE    0x1000ULL
> >  #define MPC8544_UTIL_OFFSET        0xe0000ULL
> >  #define MPC8XXX_GPIO_OFFSET        0x000FF000ULL
> >  #define MPC8544_I2C_REGS_OFFSET    0x3000ULL
> >  #define MPC8XXX_GPIO_IRQ           47
> >  #define MPC8544_I2C_IRQ            43
> > +#define MPC85XX_ESDHC_IRQ          72
> >  #define RTC_REGS_OFFSET            0x68
> >
> >  #define PLATFORM_CLK_FREQ_HZ       (400 * 1000 * 1000)
> > @@ -203,6 +207,25 @@ static void dt_i2c_create(void *fdt, const char
> *soc, const char *mpic,
> >      g_free(i2c);
> >  }
> >
> > +static void dt_sdhc_create(void *fdt, const char *parent, const char
> *mpic)
> > +{
> > +    hwaddr mmio = MPC85XX_ESDHC_REGS_OFFSET;
> > +    hwaddr size = MPC85XX_ESDHC_REGS_SIZE;
> > +    int irq = MPC85XX_ESDHC_IRQ;
> > +    char *name;
> > +
> > +    name = g_strdup_printf("%s/sdhc@%" PRIx64, parent, mmio);
> > +    qemu_fdt_add_subnode(fdt, name);
> > +    /* qemu_fdt_setprop_cells(fdt, name, "voltage-ranges", 3300, 3300);
> */
>
> Drop it if it is useless
>
> > +    qemu_fdt_setprop_cells(fdt, name, "clock-frequency", 167000000);
>
> Is this an arbitrary frequency?
>

I'll drop both since the eSDHC works also without the frequency line.

> +    qemu_fdt_setprop(fdt, name, "sdhci,auto-cmd12", NULL, 0);
> > +    qemu_fdt_setprop_phandle(fdt, name, "interrupt-parent", mpic);
> > +    qemu_fdt_setprop_cells(fdt, name, "bus-width", 4);
> > +    qemu_fdt_setprop_cells(fdt, name, "interrupts", irq, 0x2);
> > +    qemu_fdt_setprop_cells(fdt, name, "reg", mmio, size);
> > +    qemu_fdt_setprop_string(fdt, name, "compatible", "fsl,esdhc");
> > +    g_free(name);
> > +}
> >
> >  typedef struct PlatformDevtreeData {
> >      void *fdt;
> > @@ -556,6 +579,8 @@ static int
> ppce500_load_device_tree(PPCE500MachineState *pms,
> >
> >      dt_rtc_create(fdt, "i2c", "rtc");
> >
> > +    /* sdhc */
> > +    dt_sdhc_create(fdt, soc, mpic);
> >
> >      gutil = g_strdup_printf("%s/global-utilities@%llx", soc,
> >                              MPC8544_UTIL_OFFSET);
> > @@ -996,6 +1021,13 @@ void ppce500_init(MachineState *machine)
> >      i2c_slave_create_simple(i2c, "ds1338", RTC_REGS_OFFSET);
> >
> >
>
> nits: use one line for the separation
>

The extra empty line was there before and it looks like it came from moving
I2C around - notice the broken indentation of it's comment.

I'll fix that in this patch.

Best regards,
Bernhard

> +    /* eSDHC */
> > +    dev = qdev_new(TYPE_FSL_ESDHC);
> > +    s = SYS_BUS_DEVICE(dev);
> > +    sysbus_realize_and_unref(s, &error_fatal);
> > +    sysbus_mmio_map(s, 0, pmc->ccsrbar_base +
> MPC85XX_ESDHC_REGS_OFFSET);
> > +    sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev,
> MPC85XX_ESDHC_IRQ));
> > +
> >      /* General Utility device */
> >      dev = qdev_new("mpc8544-guts");
> >      s = SYS_BUS_DEVICE(dev);
> > --
>
> Regards,
> Bin
>
diff mbox series

Patch

diff --git a/docs/system/ppc/ppce500.rst b/docs/system/ppc/ppce500.rst
index c3f55c6f3d..50b199c8f3 100644
--- a/docs/system/ppc/ppce500.rst
+++ b/docs/system/ppc/ppce500.rst
@@ -19,6 +19,7 @@  The ``ppce500`` machine supports the following devices:
 * Power-off functionality via one GPIO pin
 * 1 Freescale MPC8xxx PCI host controller
 * VirtIO devices via PCI bus
+* 1 Freescale Enhanced Secure Digital Host controller (eSDHC)
 * 1 Freescale Enhanced Triple Speed Ethernet controller (eTSEC)
 
 Hardware configuration information
@@ -131,6 +132,18 @@  be used as follows:
       -drive if=pflash,file=/path/to/rootfs.ext2,format=raw \
       -append "rootwait root=/dev/mtdblock0"
 
+Alternatively, the root file system can also reside on an emulated SD card
+whose size must again be a power of two:
+
+.. code-block:: bash
+
+  $ qemu-system-ppc64 -M ppce500 -cpu e500mc -smp 4 -m 2G \
+      -display none -serial stdio \
+      -kernel vmlinux \
+      -device sd-card,drive=mydrive \
+      -drive id=mydrive,if=none,file=/path/to/rootfs.ext2,format=raw \
+      -append "rootwait root=/dev/mmcblk0"
+
 Running U-Boot
 --------------
 
diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
index 769a1ead1c..6e31f568ba 100644
--- a/hw/ppc/Kconfig
+++ b/hw/ppc/Kconfig
@@ -129,6 +129,7 @@  config E500
     select PFLASH_CFI01
     select PLATFORM_BUS
     select PPCE500_PCI
+    select SDHCI
     select SERIAL
     select MPC_I2C
     select FDT_PPC
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 7843a4e04b..87a03fd4a9 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -48,6 +48,7 @@ 
 #include "hw/net/fsl_etsec/etsec.h"
 #include "hw/i2c/i2c.h"
 #include "hw/irq.h"
+#include "hw/sd/sdhci.h"
 
 #define EPAPR_MAGIC                (0x45504150)
 #define DTC_LOAD_PAD               0x1800000
@@ -66,11 +67,14 @@ 
 #define MPC8544_SERIAL1_REGS_OFFSET 0x4600ULL
 #define MPC8544_PCI_REGS_OFFSET    0x8000ULL
 #define MPC8544_PCI_REGS_SIZE      0x1000ULL
+#define MPC85XX_ESDHC_REGS_OFFSET  0x2e000ULL
+#define MPC85XX_ESDHC_REGS_SIZE    0x1000ULL
 #define MPC8544_UTIL_OFFSET        0xe0000ULL
 #define MPC8XXX_GPIO_OFFSET        0x000FF000ULL
 #define MPC8544_I2C_REGS_OFFSET    0x3000ULL
 #define MPC8XXX_GPIO_IRQ           47
 #define MPC8544_I2C_IRQ            43
+#define MPC85XX_ESDHC_IRQ          72
 #define RTC_REGS_OFFSET            0x68
 
 #define PLATFORM_CLK_FREQ_HZ       (400 * 1000 * 1000)
@@ -203,6 +207,25 @@  static void dt_i2c_create(void *fdt, const char *soc, const char *mpic,
     g_free(i2c);
 }
 
+static void dt_sdhc_create(void *fdt, const char *parent, const char *mpic)
+{
+    hwaddr mmio = MPC85XX_ESDHC_REGS_OFFSET;
+    hwaddr size = MPC85XX_ESDHC_REGS_SIZE;
+    int irq = MPC85XX_ESDHC_IRQ;
+    char *name;
+
+    name = g_strdup_printf("%s/sdhc@%" PRIx64, parent, mmio);
+    qemu_fdt_add_subnode(fdt, name);
+    /* qemu_fdt_setprop_cells(fdt, name, "voltage-ranges", 3300, 3300); */
+    qemu_fdt_setprop_cells(fdt, name, "clock-frequency", 167000000);
+    qemu_fdt_setprop(fdt, name, "sdhci,auto-cmd12", NULL, 0);
+    qemu_fdt_setprop_phandle(fdt, name, "interrupt-parent", mpic);
+    qemu_fdt_setprop_cells(fdt, name, "bus-width", 4);
+    qemu_fdt_setprop_cells(fdt, name, "interrupts", irq, 0x2);
+    qemu_fdt_setprop_cells(fdt, name, "reg", mmio, size);
+    qemu_fdt_setprop_string(fdt, name, "compatible", "fsl,esdhc");
+    g_free(name);
+}
 
 typedef struct PlatformDevtreeData {
     void *fdt;
@@ -556,6 +579,8 @@  static int ppce500_load_device_tree(PPCE500MachineState *pms,
 
     dt_rtc_create(fdt, "i2c", "rtc");
 
+    /* sdhc */
+    dt_sdhc_create(fdt, soc, mpic);
 
     gutil = g_strdup_printf("%s/global-utilities@%llx", soc,
                             MPC8544_UTIL_OFFSET);
@@ -996,6 +1021,13 @@  void ppce500_init(MachineState *machine)
     i2c_slave_create_simple(i2c, "ds1338", RTC_REGS_OFFSET);
 
 
+    /* eSDHC */
+    dev = qdev_new(TYPE_FSL_ESDHC);
+    s = SYS_BUS_DEVICE(dev);
+    sysbus_realize_and_unref(s, &error_fatal);
+    sysbus_mmio_map(s, 0, pmc->ccsrbar_base + MPC85XX_ESDHC_REGS_OFFSET);
+    sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC85XX_ESDHC_IRQ));
+
     /* General Utility device */
     dev = qdev_new("mpc8544-guts");
     s = SYS_BUS_DEVICE(dev);