| Message ID | 20221125234656.47306-7-samuel@sholland.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | riscv: Allwinner D1/D1s platform support | expand |
Reviewed-by: Guo Ren <guoren@kernel.org> On Sat, Nov 26, 2022 at 7:47 AM Samuel Holland <samuel@sholland.org> wrote: > > "D1 Nezha" is Allwinner's first-party development board for the D1 SoC. > It was shipped with 512M, 1G, or 2G of DDR3. It supports onboard audio, > HDMI, gigabit Ethernet, WiFi and Bluetooth, USB 2.0 host and OTG ports, > plus low-speed I/O from the SoC and a GPIO expander chip. > > Reviewed-by: Heiko Stuebner <heiko@sntech.de> > Tested-by: Conor Dooley <conor.dooley@microchip.com> > Tested-by: Heiko Stuebner <heiko@sntech.de> > Signed-off-by: Samuel Holland <samuel@sholland.org> > --- > > Changes in v2: > - Common regulators moved to MangoPi MQ patch, removed analog LDOs > - Removed LRADC (depends on analog LDOs) > - Added XR829 host-wake interrupt > > arch/riscv/boot/dts/allwinner/Makefile | 1 + > .../boot/dts/allwinner/sun20i-d1-nezha.dts | 167 ++++++++++++++++++ > 2 files changed, 168 insertions(+) > create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts > > diff --git a/arch/riscv/boot/dts/allwinner/Makefile b/arch/riscv/boot/dts/allwinner/Makefile > index 2f2792594f7d..277e59d1c907 100644 > --- a/arch/riscv/boot/dts/allwinner/Makefile > +++ b/arch/riscv/boot/dts/allwinner/Makefile > @@ -1,2 +1,3 @@ > # SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-nezha.dtb > dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1s-mangopi-mq.dtb > diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts > new file mode 100644 > index 000000000000..9ea3648e64ea > --- /dev/null > +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts > @@ -0,0 +1,167 @@ > +// SPDX-License-Identifier: (GPL-2.0+ or MIT) > +// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org> > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/input.h> > + > +/dts-v1/; > + > +#include "sun20i-d1.dtsi" > +#include "sun20i-common-regulators.dtsi" > + > +/ { > + model = "Allwinner D1 Nezha"; > + compatible = "allwinner,d1-nezha", "allwinner,sun20i-d1"; > + > + aliases { > + ethernet0 = &emac; > + ethernet1 = &xr829; > + mmc0 = &mmc0; > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + reg_usbvbus: usbvbus { > + compatible = "regulator-fixed"; > + regulator-name = "usbvbus"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ > + enable-active-high; > + vin-supply = <®_vcc>; > + }; > + > + /* > + * This regulator is PWM-controlled, but the PWM controller is not > + * yet supported, so fix the regulator to its default voltage. > + */ > + reg_vdd_cpu: vdd-cpu { > + compatible = "regulator-fixed"; > + regulator-name = "vdd-cpu"; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1100000>; > + vin-supply = <®_vcc>; > + }; > + > + wifi_pwrseq: wifi-pwrseq { > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */ > + }; > +}; > + > +&cpu0 { > + cpu-supply = <®_vdd_cpu>; > +}; > + > +&dcxo { > + clock-frequency = <24000000>; > +}; > + > +&ehci0 { > + status = "okay"; > +}; > + > +&ehci1 { > + status = "okay"; > +}; > + > +&emac { > + pinctrl-0 = <&rgmii_pe_pins>; > + pinctrl-names = "default"; > + phy-handle = <&ext_rgmii_phy>; > + phy-mode = "rgmii-id"; > + phy-supply = <®_vcc_3v3>; > + status = "okay"; > +}; > + > +&i2c2 { > + pinctrl-0 = <&i2c2_pb0_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + > + pcf8574a: gpio@38 { > + compatible = "nxp,pcf8574a"; > + reg = <0x38>; > + interrupt-parent = <&pio>; > + interrupts = <1 2 IRQ_TYPE_LEVEL_LOW>; /* PB2 */ > + interrupt-controller; > + gpio-controller; > + #gpio-cells = <2>; > + #interrupt-cells = <2>; > + }; > +}; > + > +&mdio { > + ext_rgmii_phy: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + }; > +}; > + > +&mmc0 { > + bus-width = <4>; > + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ > + disable-wp; > + vmmc-supply = <®_vcc_3v3>; > + vqmmc-supply = <®_vcc_3v3>; > + pinctrl-0 = <&mmc0_pins>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&mmc1 { > + bus-width = <4>; > + mmc-pwrseq = <&wifi_pwrseq>; > + non-removable; > + vmmc-supply = <®_vcc_3v3>; > + vqmmc-supply = <®_vcc_3v3>; > + pinctrl-0 = <&mmc1_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + > + xr829: wifi@1 { > + reg = <1>; > + interrupt-parent = <&pio>; > + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */ > + interrupt-names = "host-wake"; > + }; > +}; > + > +&ohci0 { > + status = "okay"; > +}; > + > +&ohci1 { > + status = "okay"; > +}; > + > +&uart0 { > + pinctrl-0 = <&uart0_pb8_pins>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&uart1 { > + uart-has-rtscts; > + pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; > + pinctrl-names = "default"; > + status = "okay"; > + > + /* XR829 bluetooth is connected here */ > +}; > + > +&usb_otg { > + dr_mode = "otg"; > + status = "okay"; > +}; > + > +&usbphy { > + usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */ > + usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ > + usb0_vbus-supply = <®_usbvbus>; > + usb1_vbus-supply = <®_vcc>; > + status = "okay"; > +}; > -- > 2.37.4 >
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Am Samstag, 26. November 2022, 00:46:50 CET schrieb Samuel Holland: > "D1 Nezha" is Allwinner's first-party development board for the D1 SoC. > It was shipped with 512M, 1G, or 2G of DDR3. It supports onboard audio, > HDMI, gigabit Ethernet, WiFi and Bluetooth, USB 2.0 host and OTG ports, > plus low-speed I/O from the SoC and a GPIO expander chip. > > Reviewed-by: Heiko Stuebner <heiko@sntech.de> > Tested-by: Conor Dooley <conor.dooley@microchip.com> > Tested-by: Heiko Stuebner <heiko@sntech.de> > Signed-off-by: Samuel Holland <samuel@sholland.org> just to confirm the tags above, the board still runs nicely. Thanks Heiko
Dne sobota, 26. november 2022 ob 00:46:50 CET je Samuel Holland napisal(a): > "D1 Nezha" is Allwinner's first-party development board for the D1 SoC. > It was shipped with 512M, 1G, or 2G of DDR3. It supports onboard audio, > HDMI, gigabit Ethernet, WiFi and Bluetooth, USB 2.0 host and OTG ports, > plus low-speed I/O from the SoC and a GPIO expander chip. > > Reviewed-by: Heiko Stuebner <heiko@sntech.de> > Tested-by: Conor Dooley <conor.dooley@microchip.com> > Tested-by: Heiko Stuebner <heiko@sntech.de> > Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Best regards, Jernej
diff --git a/arch/riscv/boot/dts/allwinner/Makefile b/arch/riscv/boot/dts/allwinner/Makefile index 2f2792594f7d..277e59d1c907 100644 --- a/arch/riscv/boot/dts/allwinner/Makefile +++ b/arch/riscv/boot/dts/allwinner/Makefile @@ -1,2 +1,3 @@ # SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-nezha.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1s-mangopi-mq.dtb diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts new file mode 100644 index 000000000000..9ea3648e64ea --- /dev/null +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org> + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/dts-v1/; + +#include "sun20i-d1.dtsi" +#include "sun20i-common-regulators.dtsi" + +/ { + model = "Allwinner D1 Nezha"; + compatible = "allwinner,d1-nezha", "allwinner,sun20i-d1"; + + aliases { + ethernet0 = &emac; + ethernet1 = &xr829; + mmc0 = &mmc0; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_usbvbus: usbvbus { + compatible = "regulator-fixed"; + regulator-name = "usbvbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */ + enable-active-high; + vin-supply = <®_vcc>; + }; + + /* + * This regulator is PWM-controlled, but the PWM controller is not + * yet supported, so fix the regulator to its default voltage. + */ + reg_vdd_cpu: vdd-cpu { + compatible = "regulator-fixed"; + regulator-name = "vdd-cpu"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <®_vcc>; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */ + }; +}; + +&cpu0 { + cpu-supply = <®_vdd_cpu>; +}; + +&dcxo { + clock-frequency = <24000000>; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&emac { + pinctrl-0 = <&rgmii_pe_pins>; + pinctrl-names = "default"; + phy-handle = <&ext_rgmii_phy>; + phy-mode = "rgmii-id"; + phy-supply = <®_vcc_3v3>; + status = "okay"; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_pb0_pins>; + pinctrl-names = "default"; + status = "okay"; + + pcf8574a: gpio@38 { + compatible = "nxp,pcf8574a"; + reg = <0x38>; + interrupt-parent = <&pio>; + interrupts = <1 2 IRQ_TYPE_LEVEL_LOW>; /* PB2 */ + interrupt-controller; + gpio-controller; + #gpio-cells = <2>; + #interrupt-cells = <2>; + }; +}; + +&mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&mmc0 { + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + disable-wp; + vmmc-supply = <®_vcc_3v3>; + vqmmc-supply = <®_vcc_3v3>; + pinctrl-0 = <&mmc0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&mmc1 { + bus-width = <4>; + mmc-pwrseq = <&wifi_pwrseq>; + non-removable; + vmmc-supply = <®_vcc_3v3>; + vqmmc-supply = <®_vcc_3v3>; + pinctrl-0 = <&mmc1_pins>; + pinctrl-names = "default"; + status = "okay"; + + xr829: wifi@1 { + reg = <1>; + interrupt-parent = <&pio>; + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */ + interrupt-names = "host-wake"; + }; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0_pb8_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart1 { + uart-has-rtscts; + pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; + pinctrl-names = "default"; + status = "okay"; + + /* XR829 bluetooth is connected here */ +}; + +&usb_otg { + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */ + usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */ + usb0_vbus-supply = <®_usbvbus>; + usb1_vbus-supply = <®_vcc>; + status = "okay"; +};