| Message ID | 20221118011714.70877-1-hal.feng@starfivetech.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Basic device tree support for StarFive JH7110 RISC-V SoC | expand |
On Fri, 18 Nov 2022 09:17:06 +0800, Hal Feng wrote: > The original patch series "Basic StarFive JH7110 RISC-V SoC support" [1] > is split into 3 patch series. They respectively add basic clock&reset, > pinctrl and device tree support for StarFive JH7110 SoC. These patch > series are independent, but the Visionfive2 board can boot up successfully Note that this patch series depends on the patch series [1] and [2]. [1] https://lore.kernel.org/all/20221118010627.70576-1-hal.feng@starfivetech.com/ [2] https://lore.kernel.org/all/20221118011108.70715-1-hal.feng@starfivetech.com/ > only if all these patches series applied. This one adds basic device
Hello: This series was applied to riscv/linux.git (for-next) by Palmer Dabbelt <palmer@rivosinc.com>: On Fri, 18 Nov 2022 09:17:06 +0800 you wrote: > The original patch series "Basic StarFive JH7110 RISC-V SoC support" [1] > is split into 3 patch series. They respectively add basic clock&reset, > pinctrl and device tree support for StarFive JH7110 SoC. These patch > series are independent, but the Visionfive2 board can boot up successfully > only if all these patches series applied. This one adds basic device > tree support. This patch series is pulled out from the patch 1~6 and > patch 27~30 of v1 [1]. You can simply get or review the patches at the > link [2]. > > [...] Here is the summary with links: - [v2,1/8] dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive2 board (no matching commit) - [v2,2/8] dt-bindings: timer: Add StarFive JH7110 clint (no matching commit) - [v2,3/8] dt-bindings: interrupt-controller: Add StarFive JH7110 plic (no matching commit) - [v2,4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC (no matching commit) - [v2,5/8] soc: sifive: ccache: Add StarFive JH7110 support (no matching commit) - [v2,6/8] riscv: dts: starfive: Add initial StarFive JH7110 device tree (no matching commit) - [v2,7/8] riscv: dts: starfive: Add StarFive JH7110 VisionFive2 board device tree (no matching commit) - [v2,8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW https://git.kernel.org/riscv/c/6925ba3d9b8c You are awesome, thank you!
On Fri, 02 Dec 2022 11:00:17 PST (-0800), patchwork-bot+linux-riscv@kernel.org wrote: > Hello: > > This series was applied to riscv/linux.git (for-next) > by Palmer Dabbelt <palmer@rivosinc.com>: > > On Fri, 18 Nov 2022 09:17:06 +0800 you wrote: >> The original patch series "Basic StarFive JH7110 RISC-V SoC support" [1] >> is split into 3 patch series. They respectively add basic clock&reset, >> pinctrl and device tree support for StarFive JH7110 SoC. These patch >> series are independent, but the Visionfive2 board can boot up successfully >> only if all these patches series applied. This one adds basic device >> tree support. This patch series is pulled out from the patch 1~6 and >> patch 27~30 of v1 [1]. You can simply get or review the patches at the >> link [2]. >> >> [...] > > Here is the summary with links: > - [v2,1/8] dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive2 board > (no matching commit) > - [v2,2/8] dt-bindings: timer: Add StarFive JH7110 clint > (no matching commit) > - [v2,3/8] dt-bindings: interrupt-controller: Add StarFive JH7110 plic > (no matching commit) > - [v2,4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC > (no matching commit) > - [v2,5/8] soc: sifive: ccache: Add StarFive JH7110 support > (no matching commit) > - [v2,6/8] riscv: dts: starfive: Add initial StarFive JH7110 device tree > (no matching commit) > - [v2,7/8] riscv: dts: starfive: Add StarFive JH7110 VisionFive2 board device tree > (no matching commit) > - [v2,8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW > https://git.kernel.org/riscv/c/6925ba3d9b8c > > You are awesome, thank you! Looks like the bot is a little confused here, it's just that last patch that's been merged.
The original patch series "Basic StarFive JH7110 RISC-V SoC support" [1] is split into 3 patch series. They respectively add basic clock&reset, pinctrl and device tree support for StarFive JH7110 SoC. These patch series are independent, but the Visionfive2 board can boot up successfully only if all these patches series applied. This one adds basic device tree support. This patch series is pulled out from the patch 1~6 and patch 27~30 of v1 [1]. You can simply get or review the patches at the link [2]. [1]: https://lore.kernel.org/all/20220929143225.17907-1-hal.feng@linux.starfivetech.com/ [2]: https://github.com/hal-feng/linux/commits/visionfive2-minimal Changes since v1: - Rebased on tag v6.1-rc5. - Added blank line in patch 1. (by Krzysztof) - Rebased patch 4 and 6 on the newest code. (by Conor) - Dropped patch 5. (by Conor) - Removed the quirk of JH7100 in patch 6, considering this patch series should only add support for JH7110. - For patch 27, added Co-developed-by tag for Jianlong and me. Renamed cpu labels to "S76_0", "U74_*" instead of "cpu*" following the style of jh7100.dtsi. Moved all "clock-frequency" properties to the board dts. Rewrote clock-controller nodes and deleted reset-controller nodes for using auxiliary bus. Rewrote gpio nodes following generic pinctrl bindings. Removed the redundant second reset entry of uart nodes. - For patch 28, added Co-developed-by tag for Jianlong and me. Added a chosen node. Removed reserved-memory node. Added fixed frequency clock nodes for overriding the "clock-frequency" properties. Rewrote the gpio nodes following generic pinctrl bindings. - Dropped patch 30. (by Conor) - Reworded the commit messages. v1: https://lore.kernel.org/all/20220929143225.17907-1-hal.feng@linux.starfivetech.com/ Emil Renner Berthing (7): dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive2 board dt-bindings: timer: Add StarFive JH7110 clint dt-bindings: interrupt-controller: Add StarFive JH7110 plic dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC soc: sifive: ccache: Add StarFive JH7110 support riscv: dts: starfive: Add initial StarFive JH7110 device tree riscv: dts: starfive: Add StarFive JH7110 VisionFive2 board device tree Hal Feng (1): RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW .../sifive,plic-1.0.0.yaml | 1 + .../bindings/riscv/sifive,ccache0.yaml | 7 +- .../devicetree/bindings/riscv/starfive.yaml | 4 + .../bindings/timer/sifive,clint.yaml | 1 + arch/riscv/Kconfig.socs | 1 + arch/riscv/boot/dts/starfive/Makefile | 1 + .../jh7110-starfive-visionfive-v2.dts | 116 +++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 437 ++++++++++++++++++ arch/riscv/configs/defconfig | 1 + drivers/soc/Makefile | 2 +- drivers/soc/sifive/Kconfig | 2 +- drivers/soc/sifive/sifive_ccache.c | 1 + 12 files changed, 571 insertions(+), 3 deletions(-) create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-v2.dts create mode 100644 arch/riscv/boot/dts/starfive/jh7110.dtsi base-commit: 094226ad94f471a9f19e8f8e7140a09c2625abaa prerequisite-patch-id: 6b1b43a55b9773bec61ab6c1bbaa54dccbac0837 prerequisite-patch-id: 09c98554df52d17ba5fd604125f8cdd62cbe80d1 prerequisite-patch-id: 29fe0b0c19b6f0cd31114ee9fe17fe9732047f33 prerequisite-patch-id: c59d9908de90e09ba2b9a81aadbf9fb9f00c8f04 prerequisite-patch-id: 94ac03d518993921bcfc9cc9f58d7da0c3528b51 prerequisite-patch-id: 694f7400375f5b85581fc1821e427334507826f2 prerequisite-patch-id: 699d49c4439dadb4b7cf900857f027d050cd6093 prerequisite-patch-id: 40d773f5a19912f731ee5fd4739ed2e3c2157b07 prerequisite-patch-id: 2bc3fd6df5dda116efe882045863d6c88aa81b3a prerequisite-patch-id: 735e62255c75801bdc4c0b4107850bce821ff7f5 prerequisite-patch-id: b2a923b922e661fa6085185f33c1f1e733db9110 prerequisite-patch-id: b2bbc28354075432f059344eba5a127a653475cf prerequisite-patch-id: 70eab7b7eee728afcd90e40f6743d1356f6d81ab prerequisite-patch-id: 6276b2a23818c65ff2ad3d65b562615690cffee9 prerequisite-patch-id: d834ece14ffb525b8c3e661e78736692f33fca9b prerequisite-patch-id: 4c17a3ce4dae9b788795d915bf775630f5c43c53 prerequisite-patch-id: dabb913fd478e97593e45c23fee4be9fd807f851 prerequisite-patch-id: 22fa141f7f0f80a5d619e9f3f4cf161ad06f108e prerequisite-patch-id: f306819c257ea73aff8e06b17b5731053cdddfc8