Message ID | 20230307102441.94417-3-conor.dooley@microchip.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | RISC-V: enable rust | expand |
Context | Check | Description |
---|---|---|
conchuod/cover_letter | success | Series has a cover letter |
conchuod/tree_selection | success | Guessed tree name to be for-next |
conchuod/fixes_present | success | Fixes tag not required for -next series |
conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 1 and now 1 |
conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 18 this patch: 18 |
conchuod/module_param | success | Was 0 now: 0 |
conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 18 this patch: 18 |
conchuod/alphanumeric_selects | warning | Out of order selects before the patch: 728 and now 729 |
conchuod/build_rv32_defconfig | success | Build OK |
conchuod/dtb_warn_rv64 | success | Errors and warnings before: 3 this patch: 3 |
conchuod/header_inline | success | No static functions without inline keyword in header files |
conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 24 lines checked |
conchuod/source_inline | success | Was 0 now: 0 |
conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
conchuod/verify_fixes | success | No Fixes tag |
conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Tue, Mar 7, 2023 at 11:25 AM Conor Dooley <conor.dooley@microchip.com> wrote: > > While adding RISC-V to the table, I took the chance to re-sort it > alphabetically. For reference, there is a patch for this coming at: https://lore.kernel.org/rust-for-linux/I0YeaNjTtc4Nh47ZLJfAs6rgfAc_QZxhynNfz-GQKssVZ1S2UI_cTScCkp9-oX-hPYVcP3EfF7N0HMB9iAlm1FcvOJagnQoLeHtiW3bGCgM=@bamelis.dev/ Cheers, Miguel
On Tue, Mar 07, 2023 at 11:56:30AM +0100, Miguel Ojeda wrote: > On Tue, Mar 7, 2023 at 11:25 AM Conor Dooley <conor.dooley@microchip.com> wrote: > > > > While adding RISC-V to the table, I took the chance to re-sort it > > alphabetically. > > For reference, there is a patch for this coming at: > > https://lore.kernel.org/rust-for-linux/I0YeaNjTtc4Nh47ZLJfAs6rgfAc_QZxhynNfz-GQKssVZ1S2UI_cTScCkp9-oX-hPYVcP3EfF7N0HMB9iAlm1FcvOJagnQoLeHtiW3bGCgM=@bamelis.dev/ Cool. Git should resolve that, probably without even generating a conflict in -next, right?
On Tue, Mar 7, 2023 at 12:01 PM Conor Dooley <conor.dooley@microchip.com> wrote: > > Cool. Git should resolve that, probably without even generating a > conflict in -next, right? I think it will conflict. Since the cleanup is elsewhere and it may add work for the -next maintainer, it is probably best to take it out in v2. Cheers, Miguel
On Tue, Mar 07, 2023 at 12:56:30PM +0100, Miguel Ojeda wrote: > On Tue, Mar 7, 2023 at 12:01 PM Conor Dooley <conor.dooley@microchip.com> wrote: > > > > Cool. Git should resolve that, probably without even generating a > > conflict in -next, right? > > I think it will conflict. > > Since the cleanup is elsewhere and it may add work for the -next > maintainer, it is probably best to take it out in v2. If you think it will conflict as-is, it's probably gonna conflict either way. You've pointed out several small bits, I'll send a v2 in a few days. Cheers, Conor.
diff --git a/Documentation/rust/arch-support.rst b/Documentation/rust/arch-support.rst index ed7f4f5b3cf15..77765ffd5af41 100644 --- a/Documentation/rust/arch-support.rst +++ b/Documentation/rust/arch-support.rst @@ -15,7 +15,8 @@ support corresponds to ``S`` values in the ``MAINTAINERS`` file. ============ ================ ============================================== Architecture Level of support Constraints ============ ================ ============================================== -``x86`` Maintained ``x86_64`` only. +``riscv`` Maintained ``riscv64`` only. ``um`` Maintained ``x86_64`` only. +``x86`` Maintained ``x86_64`` only. ============ ================ ============================================== diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index c5e42cc376048..c3179b139361f 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -114,6 +114,7 @@ config RISCV select HAVE_POSIX_CPU_TIMERS_TASK_WORK select HAVE_REGS_AND_STACK_ACCESS_API select HAVE_RSEQ + select HAVE_RUST if 64BIT select HAVE_STACKPROTECTOR select HAVE_SYSCALL_TRACEPOINTS select IRQ_DOMAIN diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 6203c33789228..950612bf193cf 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -31,6 +31,8 @@ ifeq ($(CONFIG_ARCH_RV64I),y) KBUILD_AFLAGS += -mabi=lp64 KBUILD_LDFLAGS += -melf64lriscv + + KBUILD_RUSTFLAGS += -Ctarget-cpu=generic-rv64 else BITS := 32 UTS_MACHINE := riscv32