Message ID | 20230504-simple-chant-c33c14cc9e4e@spud (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Palmer Dabbelt |
Headers | show |
Series | ISA string parser cleanups++ | expand |
Context | Check | Description |
---|---|---|
conchuod/tree_selection | fail | Failed to apply to next/pending-fixes or riscv/for-next |
On Thu, May 04, 2023 at 07:14:21PM +0100, Conor Dooley wrote: > From: Sunil V L <sunilvl@ventanamicro.com> > > During boot we call riscv_of_processor_hartid() for each hart that we > add to the possible cpus list. Repeating the call again here is not > required, if we iterate over the list of possible CPUs, rather than the > list of all CPUs. > > The call to of_property_read_string() for "riscv,isa" cannot fail > either, as it has previously succeeded in riscv_of_processor_hartid(), > but leaving in the error checking makes the operation of the loop more > obvious & provides leeway for future refactoring of > riscv_of_processor_hartid(). > > Partially ripped from Sunil's ACPI support series, with the logic > inverted to continue early on failure. > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> > Co-developed-by: Conor Dooley <conor.dooley@microchip.com> > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > arch/riscv/kernel/cpufeature.c | 15 ++++++++++----- > 1 file changed, 10 insertions(+), 5 deletions(-) > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 00df7a3a3931..3ae456413f79 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -12,6 +12,7 @@ #include <linux/memory.h> #include <linux/module.h> #include <linux/of.h> +#include <linux/of_device.h> #include <asm/alternative.h> #include <asm/cacheflush.h> #include <asm/cpufeature.h> @@ -99,7 +100,7 @@ void __init riscv_fill_hwcap(void) char print_str[NUM_ALPHA_EXTS + 1]; int i, j, rc; unsigned long isa2hwcap[26] = {0}; - unsigned long hartid; + unsigned int cpu; isa2hwcap['i' - 'a'] = COMPAT_HWCAP_ISA_I; isa2hwcap['m' - 'a'] = COMPAT_HWCAP_ISA_M; @@ -112,15 +113,19 @@ void __init riscv_fill_hwcap(void) bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX); - for_each_of_cpu_node(node) { + for_each_possible_cpu(cpu) { unsigned long this_hwcap = 0; DECLARE_BITMAP(this_isa, RISCV_ISA_EXT_MAX); - rc = riscv_of_processor_hartid(node, &hartid); - if (rc < 0) + node = of_cpu_device_node_get(cpu); + if (!node) { + pr_warn("Unable to find cpu node\n"); continue; + } - if (of_property_read_string(node, "riscv,isa", &isa)) { + rc = of_property_read_string(node, "riscv,isa", &isa); + of_node_put(node); + if (rc) { pr_warn("Unable to find \"riscv,isa\" devicetree entry\n"); continue; }