Message ID | 20230404153452.2405681-1-apatel@ventanamicro.com (mailing list archive) |
---|---|
Headers | show |
Series | RISC-V KVM virtualize AIA CSRs | expand |
On Tue, 04 Apr 2023 08:34:43 PDT (-0700), apatel@ventanamicro.com wrote: > The RISC-V AIA specification is now frozen as-per the RISC-V international > process. The latest frozen specifcation can be found at: > https://github.com/riscv/riscv-aia/releases/download/1.0-RC3/riscv-interrupts-1.0-RC3.pdf > > This series implements first phase of AIA virtualization which targets > virtualizing AIA CSRs. This also provides a foundation for the second > phase of AIA virtualization which will target in-kernel AIA irqchip > (including both IMSIC and APLIC). > > The first two patches are shared with the "Linux RISC-V AIA Support" > series which adds AIA driver support. > > To test this series, use AIA drivers from the "Linux RISC-V AIA Support" > series and use KVMTOOL from the riscv_aia_v1 branch at: > https://github.com/avpatel/kvmtool.git > > These patches can also be found in the riscv_kvm_aia_csr_v4 branch at: > https://github.com/avpatel/linux.git > > Based-on: 20230401112730.2105240-1-apatel@ventanamicro.com > (https://lore.kernel.org/lkml/20230401112730.2105240-1-apatel@ventanamicro.com/) > > Based-on: 20230403121527.2286489-1-apatel@ventanamicro.com > (https://lore.kernel.org/lkml/20230403121527.2286489-1-apatel@ventanamicro.com/) > > Changes since v3: > - Split PATCH7 into two patches > - Addressed comments in PATCH7, PATCH8 and PATCH9 > > Changes since v2: > - Rebased on Linux-6.3-rc5 > - Split PATCH5 into two separate patches as suggested by Atish. > > Changes since v1: > - Addressed from Drew and Conor in PATCH1 > - Use alphabetical ordering for SMAIA and SSAIA enum in PATCH2 > - Use GENMASK() in PATCH3 > > Anup Patel (9): > RISC-V: Add AIA related CSR defines > RISC-V: Detect AIA CSRs from ISA string > RISC-V: KVM: Drop the _MASK suffix from hgatp.VMID mask defines > RISC-V: KVM: Initial skeletal support for AIA > RISC-V: KVM: Implement subtype for CSR ONE_REG interface > RISC-V: KVM: Add ONE_REG interface for AIA CSRs > RISC-V: KVM: Use bitmap for irqs_pending and irqs_pending_mask > RISC-V: KVM: Virtualize per-HART AIA CSRs > RISC-V: KVM: Implement guest external interrupt line management > > arch/riscv/include/asm/csr.h | 107 ++++- > arch/riscv/include/asm/hwcap.h | 8 + > arch/riscv/include/asm/kvm_aia.h | 137 +++++++ > arch/riscv/include/asm/kvm_host.h | 14 +- > arch/riscv/include/uapi/asm/kvm.h | 18 +- > arch/riscv/kernel/cpu.c | 2 + > arch/riscv/kernel/cpufeature.c | 2 + > arch/riscv/kvm/Makefile | 1 + > arch/riscv/kvm/aia.c | 627 ++++++++++++++++++++++++++++++ > arch/riscv/kvm/main.c | 23 +- > arch/riscv/kvm/mmu.c | 3 +- > arch/riscv/kvm/vcpu.c | 190 +++++++-- > arch/riscv/kvm/vcpu_insn.c | 1 + > arch/riscv/kvm/vm.c | 4 + > arch/riscv/kvm/vmid.c | 4 +- > 15 files changed, 1083 insertions(+), 58 deletions(-) > create mode 100644 arch/riscv/include/asm/kvm_aia.h > create mode 100644 arch/riscv/kvm/aia.c Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
On Tue, Apr 4, 2023 at 9:05 PM Anup Patel <apatel@ventanamicro.com> wrote: > > The RISC-V AIA specification is now frozen as-per the RISC-V international > process. The latest frozen specifcation can be found at: > https://github.com/riscv/riscv-aia/releases/download/1.0-RC3/riscv-interrupts-1.0-RC3.pdf > > This series implements first phase of AIA virtualization which targets > virtualizing AIA CSRs. This also provides a foundation for the second > phase of AIA virtualization which will target in-kernel AIA irqchip > (including both IMSIC and APLIC). > > The first two patches are shared with the "Linux RISC-V AIA Support" > series which adds AIA driver support. > > To test this series, use AIA drivers from the "Linux RISC-V AIA Support" > series and use KVMTOOL from the riscv_aia_v1 branch at: > https://github.com/avpatel/kvmtool.git > > These patches can also be found in the riscv_kvm_aia_csr_v4 branch at: > https://github.com/avpatel/linux.git > > Based-on: 20230401112730.2105240-1-apatel@ventanamicro.com > (https://lore.kernel.org/lkml/20230401112730.2105240-1-apatel@ventanamicro.com/) > > Based-on: 20230403121527.2286489-1-apatel@ventanamicro.com > (https://lore.kernel.org/lkml/20230403121527.2286489-1-apatel@ventanamicro.com/) > > Changes since v3: > - Split PATCH7 into two patches > - Addressed comments in PATCH7, PATCH8 and PATCH9 > > Changes since v2: > - Rebased on Linux-6.3-rc5 > - Split PATCH5 into two separate patches as suggested by Atish. > > Changes since v1: > - Addressed from Drew and Conor in PATCH1 > - Use alphabetical ordering for SMAIA and SSAIA enum in PATCH2 > - Use GENMASK() in PATCH3 > > Anup Patel (9): > RISC-V: Add AIA related CSR defines > RISC-V: Detect AIA CSRs from ISA string > RISC-V: KVM: Drop the _MASK suffix from hgatp.VMID mask defines > RISC-V: KVM: Initial skeletal support for AIA > RISC-V: KVM: Implement subtype for CSR ONE_REG interface > RISC-V: KVM: Add ONE_REG interface for AIA CSRs > RISC-V: KVM: Use bitmap for irqs_pending and irqs_pending_mask > RISC-V: KVM: Virtualize per-HART AIA CSRs > RISC-V: KVM: Implement guest external interrupt line management I have queued PATCH1 to PATCH8 for Linux-6.4 The PATCH9 depends on "RISC-V IPI Improvements" series so this patch will be sent as separate PR or differed to Linux-6.5 Regards, Anup > > arch/riscv/include/asm/csr.h | 107 ++++- > arch/riscv/include/asm/hwcap.h | 8 + > arch/riscv/include/asm/kvm_aia.h | 137 +++++++ > arch/riscv/include/asm/kvm_host.h | 14 +- > arch/riscv/include/uapi/asm/kvm.h | 18 +- > arch/riscv/kernel/cpu.c | 2 + > arch/riscv/kernel/cpufeature.c | 2 + > arch/riscv/kvm/Makefile | 1 + > arch/riscv/kvm/aia.c | 627 ++++++++++++++++++++++++++++++ > arch/riscv/kvm/main.c | 23 +- > arch/riscv/kvm/mmu.c | 3 +- > arch/riscv/kvm/vcpu.c | 190 +++++++-- > arch/riscv/kvm/vcpu_insn.c | 1 + > arch/riscv/kvm/vm.c | 4 + > arch/riscv/kvm/vmid.c | 4 +- > 15 files changed, 1083 insertions(+), 58 deletions(-) > create mode 100644 arch/riscv/include/asm/kvm_aia.h > create mode 100644 arch/riscv/kvm/aia.c > > -- > 2.34.1 >
Hello: This series was applied to riscv/linux.git (fixes) by Anup Patel <anup@brainfault.org>: On Tue, 4 Apr 2023 21:04:43 +0530 you wrote: > The RISC-V AIA specification is now frozen as-per the RISC-V international > process. The latest frozen specifcation can be found at: > https://github.com/riscv/riscv-aia/releases/download/1.0-RC3/riscv-interrupts-1.0-RC3.pdf > > This series implements first phase of AIA virtualization which targets > virtualizing AIA CSRs. This also provides a foundation for the second > phase of AIA virtualization which will target in-kernel AIA irqchip > (including both IMSIC and APLIC). > > [...] Here is the summary with links: - [v4,1/9] RISC-V: Add AIA related CSR defines https://git.kernel.org/riscv/c/d6f5f6e904be - [v4,2/9] RISC-V: Detect AIA CSRs from ISA string https://git.kernel.org/riscv/c/8fe6f7e14c7e - [v4,3/9] RISC-V: KVM: Drop the _MASK suffix from hgatp.VMID mask defines (no matching commit) - [v4,4/9] RISC-V: KVM: Initial skeletal support for AIA (no matching commit) - [v4,5/9] RISC-V: KVM: Implement subtype for CSR ONE_REG interface (no matching commit) - [v4,6/9] RISC-V: KVM: Add ONE_REG interface for AIA CSRs (no matching commit) - [v4,7/9] RISC-V: KVM: Use bitmap for irqs_pending and irqs_pending_mask (no matching commit) - [v4,8/9] RISC-V: KVM: Virtualize per-HART AIA CSRs (no matching commit) - [v4,9/9] RISC-V: KVM: Implement guest external interrupt line management (no matching commit) You are awesome, thank you!