diff mbox series

[v3,14/21] KVM:VMX: Add a synthetic MSR to allow userspace to access GUEST_SSP

Message ID 20230511040857.6094-15-weijiang.yang@intel.com (mailing list archive)
State New, archived
Headers show
Series Enable CET Virtualization | expand

Commit Message

Yang, Weijiang May 11, 2023, 4:08 a.m. UTC 
Introduce a host-only synthetic MSR, MSR_KVM_GUEST_SSP, so that the VMM
can read/write the guest's SSP, e.g. to migrate CET state.  Use a synthetic
MSR, e.g. as opposed to a VCPU_REG_, as GUEST_SSP is subject to the same
consistency checks as the PL*_SSP MSRs, i.e. can share code.

Co-developed-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
---
 arch/x86/include/uapi/asm/kvm_para.h |  1 +
 arch/x86/kvm/vmx/vmx.c               | 15 ++++++++++++---
 arch/x86/kvm/x86.c                   |  4 ++++
 3 files changed, 17 insertions(+), 3 deletions(-)

Comments

Binbin Wu May 23, 2023, 8:57 a.m. UTC | #1 
On 5/11/2023 12:08 PM, Yang Weijiang wrote:
> Introduce a host-only synthetic MSR, MSR_KVM_GUEST_SSP, so that the VMM
> can read/write the guest's SSP, e.g. to migrate CET state.  Use a synthetic
> MSR, e.g. as opposed to a VCPU_REG_, as GUEST_SSP is subject to the same
> consistency checks as the PL*_SSP MSRs, i.e. can share code.
>
> Co-developed-by: Sean Christopherson <sean.j.christopherson@intel.com>
> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> ---
>   arch/x86/include/uapi/asm/kvm_para.h |  1 +
>   arch/x86/kvm/vmx/vmx.c               | 15 ++++++++++++---
>   arch/x86/kvm/x86.c                   |  4 ++++
>   3 files changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/include/uapi/asm/kvm_para.h b/arch/x86/include/uapi/asm/kvm_para.h
> index 6e64b27b2c1e..7af465e4e0bd 100644
> --- a/arch/x86/include/uapi/asm/kvm_para.h
> +++ b/arch/x86/include/uapi/asm/kvm_para.h
> @@ -58,6 +58,7 @@
>   #define MSR_KVM_ASYNC_PF_INT	0x4b564d06
>   #define MSR_KVM_ASYNC_PF_ACK	0x4b564d07
>   #define MSR_KVM_MIGRATION_CONTROL	0x4b564d08
> +#define MSR_KVM_GUEST_SSP	0x4b564d09
>   
>   struct kvm_steal_time {
>   	__u64 steal;
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 0ccaa467d7d3..72149156bbd3 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -2095,9 +2095,13 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>   		break;
>   	case MSR_IA32_U_CET:
>   	case MSR_IA32_PL3_SSP:
> +	case MSR_KVM_GUEST_SSP:
>   		if (!kvm_cet_is_msr_accessible(vcpu, msr_info))
>   			return 1;
> -		kvm_get_xsave_msr(msr_info);
> +		if (msr_info->index == MSR_KVM_GUEST_SSP)
> +			msr_info->data = vmcs_readl(GUEST_SSP);
According to the change of the kvm_cet_is_msr_accessible() below,
kvm_cet_is_msr_accessible() will return false for MSR_KVM_GUEST_SSP, 
then this code is unreachable?

> +		else
> +			kvm_get_xsave_msr(msr_info);
>   		break;
>   	case MSR_IA32_DEBUGCTLMSR:
>   		msr_info->data = vmcs_read64(GUEST_IA32_DEBUGCTL);
> @@ -2413,15 +2417,20 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>   		break;
>   	case MSR_IA32_U_CET:
>   	case MSR_IA32_PL3_SSP:
> +	case MSR_KVM_GUEST_SSP:
>   		if (!kvm_cet_is_msr_accessible(vcpu, msr_info))
>   			return 1;
>   		if (is_noncanonical_address(data, vcpu))
>   			return 1;
>   		if (msr_index == MSR_IA32_U_CET && (data & GENMASK(9, 6)))
>   			return 1;
> -		if (msr_index == MSR_IA32_PL3_SSP && (data & GENMASK(2, 0)))
> +		if ((msr_index == MSR_IA32_PL3_SSP ||
> +		     msr_index == MSR_KVM_GUEST_SSP) && (data & GENMASK(2, 0)))
>   			return 1;
> -		kvm_set_xsave_msr(msr_info);
> +		if (msr_index == MSR_KVM_GUEST_SSP)
> +			vmcs_writel(GUEST_SSP, data);
> +		else
> +			kvm_set_xsave_msr(msr_info);
>   		break;
>   	case MSR_IA32_PERF_CAPABILITIES:
>   		if (data && !vcpu_to_pmu(vcpu)->version)
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 2e3a39c9297c..baac6acebd40 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -13642,6 +13642,10 @@ bool kvm_cet_is_msr_accessible(struct kvm_vcpu *vcpu, struct msr_data *msr)
>   	    !guest_cpuid_has(vcpu, X86_FEATURE_IBT))
>   		return false;
>   
> +	/* The synthetic MSR is for userspace access only. */
> +	if (msr->index == MSR_KVM_GUEST_SSP)
> +		return false;
> +
>   	if (msr->index == MSR_IA32_PL3_SSP &&
>   	    !guest_cpuid_has(vcpu, X86_FEATURE_SHSTK))
>   		return false;
Yang, Weijiang May 24, 2023, 2:55 a.m. UTC | #2 
On 5/23/2023 4:57 PM, Binbin Wu wrote:
>
>
> On 5/11/2023 12:08 PM, Yang Weijiang wrote:
>> Introduce a host-only synthetic MSR, MSR_KVM_GUEST_SSP, so that the VMM
>> can read/write the guest's SSP, e.g. to migrate CET state.  Use a 
>> synthetic
>> MSR, e.g. as opposed to a VCPU_REG_, as GUEST_SSP is subject to the same
>> consistency checks as the PL*_SSP MSRs, i.e. can share code.
>>
>> Co-developed-by: Sean Christopherson <sean.j.christopherson@intel.com>
>> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
>> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
>> ---
>>   arch/x86/include/uapi/asm/kvm_para.h |  1 +
>>   arch/x86/kvm/vmx/vmx.c               | 15 ++++++++++++---
>>   arch/x86/kvm/x86.c                   |  4 ++++
>>   3 files changed, 17 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/x86/include/uapi/asm/kvm_para.h 
>> b/arch/x86/include/uapi/asm/kvm_para.h
>> index 6e64b27b2c1e..7af465e4e0bd 100644
>> --- a/arch/x86/include/uapi/asm/kvm_para.h
>> +++ b/arch/x86/include/uapi/asm/kvm_para.h
>> @@ -58,6 +58,7 @@
>>   #define MSR_KVM_ASYNC_PF_INT    0x4b564d06
>>   #define MSR_KVM_ASYNC_PF_ACK    0x4b564d07
>>   #define MSR_KVM_MIGRATION_CONTROL    0x4b564d08
>> +#define MSR_KVM_GUEST_SSP    0x4b564d09
>>     struct kvm_steal_time {
>>       __u64 steal;
>> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
>> index 0ccaa467d7d3..72149156bbd3 100644
>> --- a/arch/x86/kvm/vmx/vmx.c
>> +++ b/arch/x86/kvm/vmx/vmx.c
>> @@ -2095,9 +2095,13 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, 
>> struct msr_data *msr_info)
>>           break;
>>       case MSR_IA32_U_CET:
>>       case MSR_IA32_PL3_SSP:
>> +    case MSR_KVM_GUEST_SSP:
>>           if (!kvm_cet_is_msr_accessible(vcpu, msr_info))
>>               return 1;
>> -        kvm_get_xsave_msr(msr_info);
>> +        if (msr_info->index == MSR_KVM_GUEST_SSP)
>> +            msr_info->data = vmcs_readl(GUEST_SSP);
> According to the change of the kvm_cet_is_msr_accessible() below,
> kvm_cet_is_msr_accessible() will return false for MSR_KVM_GUEST_SSP, 
> then this code is unreachable?

No, when the access is initiated from host side, 
kvm_cet_is_msr_accessible() return true for MSR_KVM_GUEST_SSP.

So the code is reachable:

if (msr->host_initiated)

     return true;


[...]
diff mbox series

Patch

diff --git a/arch/x86/include/uapi/asm/kvm_para.h b/arch/x86/include/uapi/asm/kvm_para.h
index 6e64b27b2c1e..7af465e4e0bd 100644
--- a/arch/x86/include/uapi/asm/kvm_para.h
+++ b/arch/x86/include/uapi/asm/kvm_para.h
@@ -58,6 +58,7 @@ 
 #define MSR_KVM_ASYNC_PF_INT	0x4b564d06
 #define MSR_KVM_ASYNC_PF_ACK	0x4b564d07
 #define MSR_KVM_MIGRATION_CONTROL	0x4b564d08
+#define MSR_KVM_GUEST_SSP	0x4b564d09
 
 struct kvm_steal_time {
 	__u64 steal;
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index 0ccaa467d7d3..72149156bbd3 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -2095,9 +2095,13 @@  static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 		break;
 	case MSR_IA32_U_CET:
 	case MSR_IA32_PL3_SSP:
+	case MSR_KVM_GUEST_SSP:
 		if (!kvm_cet_is_msr_accessible(vcpu, msr_info))
 			return 1;
-		kvm_get_xsave_msr(msr_info);
+		if (msr_info->index == MSR_KVM_GUEST_SSP)
+			msr_info->data = vmcs_readl(GUEST_SSP);
+		else
+			kvm_get_xsave_msr(msr_info);
 		break;
 	case MSR_IA32_DEBUGCTLMSR:
 		msr_info->data = vmcs_read64(GUEST_IA32_DEBUGCTL);
@@ -2413,15 +2417,20 @@  static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 		break;
 	case MSR_IA32_U_CET:
 	case MSR_IA32_PL3_SSP:
+	case MSR_KVM_GUEST_SSP:
 		if (!kvm_cet_is_msr_accessible(vcpu, msr_info))
 			return 1;
 		if (is_noncanonical_address(data, vcpu))
 			return 1;
 		if (msr_index == MSR_IA32_U_CET && (data & GENMASK(9, 6)))
 			return 1;
-		if (msr_index == MSR_IA32_PL3_SSP && (data & GENMASK(2, 0)))
+		if ((msr_index == MSR_IA32_PL3_SSP ||
+		     msr_index == MSR_KVM_GUEST_SSP) && (data & GENMASK(2, 0)))
 			return 1;
-		kvm_set_xsave_msr(msr_info);
+		if (msr_index == MSR_KVM_GUEST_SSP)
+			vmcs_writel(GUEST_SSP, data);
+		else
+			kvm_set_xsave_msr(msr_info);
 		break;
 	case MSR_IA32_PERF_CAPABILITIES:
 		if (data && !vcpu_to_pmu(vcpu)->version)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 2e3a39c9297c..baac6acebd40 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -13642,6 +13642,10 @@  bool kvm_cet_is_msr_accessible(struct kvm_vcpu *vcpu, struct msr_data *msr)
 	    !guest_cpuid_has(vcpu, X86_FEATURE_IBT))
 		return false;
 
+	/* The synthetic MSR is for userspace access only. */
+	if (msr->index == MSR_KVM_GUEST_SSP)
+		return false;
+
 	if (msr->index == MSR_IA32_PL3_SSP &&
 	    !guest_cpuid_has(vcpu, X86_FEATURE_SHSTK))
 		return false;