Message ID | 20230606103932.2790-1-duke_xinanwen@163.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | [v6] bus: mhi: host: pci_generic: Add support for Quectel RM520N-GL modem | expand |
On Tue, Jun 06, 2023 at 03:39:32AM -0700, Duke Xin(辛安文) wrote: > Add MHI interface definition for RM520 product based on Qualcomm SDX6X chip > > Signed-off-by: Duke Xin(辛安文) <duke_xinanwen@163.com> > --- What has changed since v1? Where is the changelog? I clearly mentioned that you need to add changelog and also keep the review tags given for earlier revisions. I cannot repeat this message for every iteration. You are wasting everyone's time by not adhering to patch submissioon guidelines: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/5.Posting.rst - Mani > drivers/bus/mhi/host/pci_generic.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c > index db0a0b062d8e..69be969672f1 100644 > --- a/drivers/bus/mhi/host/pci_generic.c > +++ b/drivers/bus/mhi/host/pci_generic.c > @@ -334,6 +334,16 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = { > .sideband_wake = true, > }; > > +static const struct mhi_pci_dev_info mhi_quectel_rm5xx_info = { > + .name = "quectel-rm5xx", > + .edl = "qcom/prog_firehose_sdx6x.elf", > + .config = &modem_quectel_em1xx_config, > + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, > + .dma_data_width = 32, > + .mru_default = 32768, > + .sideband_wake = true, > +}; > + > static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = { > MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 0), > MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 0), > @@ -573,6 +583,9 @@ static const struct pci_device_id mhi_pci_id_table[] = { > .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, > { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */ > .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, > + /* RM520N-GL (sdx6x), eSIM */ > + { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1004), > + .driver_data = (kernel_ulong_t) &mhi_quectel_rm5xx_info }, > { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */ > .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, > /* T99W175 (sdx55), Both for eSIM and Non-eSIM */ > -- > 2.25.1 >
Hi Mani Deeply sorry, I will carefully check and resubmit according to [patch submissioon guidelines]. Thank you for your review. 辛安文 Duke Xin | Software Department IX Engineer | Quectel Wireless Solutions Co., Ltd. Mobile: +86-15375456183 | Email : Duke.xin@quectel.com | Tel: +86-0551-65869386-8632 Website: www.quectel.com | QQ: 602659072 | Wechat: 15375456183 Building 1-C, China Speech Valley Area A, 3335 Xiyou Road, High-tech Zone, Hefei, Anhui 230088, China 安徽省合肥市高新区习友路3335号中国(合肥)国际智能语音产业园A区1号中试楼 230088 HQ: Building 5, Shanghai Business Park Phase III (Area B), No.1016 Tianlin Road, Minhang District, Shanghai 200233, China 总部:上海市闵行区田林路1016号科技绿洲3期(B区)5号楼 200233 -----邮件原件----- 发件人: Manivannan Sadhasivam <mani@kernel.org> 发送时间: 2023年6月6日 19:32 收件人: Duke Xin(辛安文) <duke_xinanwen@163.com> 抄送: loic.poulain@linaro.org; slark_xiao@163.com; fabio.porcedda@gmail.com; koen.vandeputte@citymesh.com; quic_jhugo@quicinc.com; johan+linaro@kernel.org; bhelgaas@google.com; mhi@lists.linux.dev; linux-arm-msm@vger.kernel.org; Jerry Meng(蒙杰) <jerry.meng@quectel.com>; Duke Xin(辛安文) <duke.xin@quectel.com> 主题: Re: [PATCH v6] bus: mhi: host: pci_generic: Add support for Quectel RM520N-GL modem On Tue, Jun 06, 2023 at 03:39:32AM -0700, Duke Xin(辛安文) wrote: > Add MHI interface definition for RM520 product based on Qualcomm SDX6X > chip > > Signed-off-by: Duke Xin(辛安文) <duke_xinanwen@163.com> > --- What has changed since v1? Where is the changelog? I clearly mentioned that you need to add changelog and also keep the review tags given for earlier revisions. I cannot repeat this message for every iteration. You are wasting everyone's time by not adhering to patch submissioon guidelines: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/5.Posting.rst - Mani > drivers/bus/mhi/host/pci_generic.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/bus/mhi/host/pci_generic.c > b/drivers/bus/mhi/host/pci_generic.c > index db0a0b062d8e..69be969672f1 100644 > --- a/drivers/bus/mhi/host/pci_generic.c > +++ b/drivers/bus/mhi/host/pci_generic.c > @@ -334,6 +334,16 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = { > .sideband_wake = true, > }; > > +static const struct mhi_pci_dev_info mhi_quectel_rm5xx_info = { > + .name = "quectel-rm5xx", > + .edl = "qcom/prog_firehose_sdx6x.elf", > + .config = &modem_quectel_em1xx_config, > + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, > + .dma_data_width = 32, > + .mru_default = 32768, > + .sideband_wake = true, > +}; > + > static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = { > MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 0), > MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 0), @@ -573,6 +583,9 @@ > static const struct pci_device_id mhi_pci_id_table[] = { > .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, > { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */ > .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, > + /* RM520N-GL (sdx6x), eSIM */ > + { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1004), > + .driver_data = (kernel_ulong_t) &mhi_quectel_rm5xx_info }, > { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */ > .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, > /* T99W175 (sdx55), Both for eSIM and Non-eSIM */ > -- > 2.25.1 >
diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c index db0a0b062d8e..69be969672f1 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -334,6 +334,16 @@ static const struct mhi_pci_dev_info mhi_quectel_em1xx_info = { .sideband_wake = true, }; +static const struct mhi_pci_dev_info mhi_quectel_rm5xx_info = { + .name = "quectel-rm5xx", + .edl = "qcom/prog_firehose_sdx6x.elf", + .config = &modem_quectel_em1xx_config, + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, + .dma_data_width = 32, + .mru_default = 32768, + .sideband_wake = true, +}; + static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = { MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 32, 0), MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 32, 0), @@ -573,6 +583,9 @@ static const struct pci_device_id mhi_pci_id_table[] = { .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */ .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, + /* RM520N-GL (sdx6x), eSIM */ + { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1004), + .driver_data = (kernel_ulong_t) &mhi_quectel_rm5xx_info }, { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */ .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, /* T99W175 (sdx55), Both for eSIM and Non-eSIM */
Add MHI interface definition for RM520 product based on Qualcomm SDX6X chip Signed-off-by: Duke Xin(辛安文) <duke_xinanwen@163.com> --- drivers/bus/mhi/host/pci_generic.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)