Message ID | 20230619172101.18692-1-palmer@rivosinc.com (mailing list archive) |
---|---|
State | Accepted |
Commit | e50db34efdc8cac2f17b8f5d32fddd7b58914ce6 |
Headers | show |
Series | RISC-V: Fix up some vector state related build failures | expand |
Context | Check | Description |
---|---|---|
conchuod/cover_letter | success | Single patches do not need cover letters |
conchuod/tree_selection | success | Guessed tree name to be for-next at HEAD 16252e018a30 |
conchuod/fixes_present | success | Fixes tag not required for -next series |
conchuod/maintainers_pattern | success | MAINTAINERS pattern errors before the patch: 6 and now 6 |
conchuod/verify_signedoff | success | Signed-off-by tag matches author and committer |
conchuod/kdoc | success | Errors and warnings before: 0 this patch: 0 |
conchuod/build_rv64_clang_allmodconfig | success | Errors and warnings before: 2833 this patch: 2833 |
conchuod/module_param | success | Was 0 now: 0 |
conchuod/build_rv64_gcc_allmodconfig | success | Errors and warnings before: 16546 this patch: 16546 |
conchuod/build_rv32_defconfig | success | Build OK |
conchuod/dtb_warn_rv64 | success | Errors and warnings before: 20 this patch: 20 |
conchuod/header_inline | success | No static functions without inline keyword in header files |
conchuod/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 14 lines checked |
conchuod/build_rv64_nommu_k210_defconfig | success | Build OK |
conchuod/verify_fixes | success | Fixes tag looks correct |
conchuod/build_rv64_nommu_virt_defconfig | success | Build OK |
On Mon, Jun 19, 2023 at 10:21:01AM -0700, Palmer Dabbelt wrote: > I get a few build failures along the lines of > > ./arch/riscv/include/uapi/asm/sigcontext.h:19:36: error: field ‘v_state’ has incomplete type > 19 | struct __riscv_v_ext_state v_state; > | ^~~~~~~ > ./arch/riscv/include/uapi/asm/sigcontext.h:32:49: error: field ‘sc_extdesc’ has incomplete type > 32 | struct __riscv_extra_ext_header sc_extdesc; > > The V structures in question are defined for !assembly, so let's just do > so for the others. > > Fixes: 8ee0b41898fa ("riscv: signal: Add sigcontext save/restore for vector") > Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Not the first time you've caught this sort of problem in headers, is there a particular build that catches these? Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Cheers, Conor. > --- > arch/riscv/include/uapi/asm/sigcontext.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/riscv/include/uapi/asm/sigcontext.h b/arch/riscv/include/uapi/asm/sigcontext.h > index 8b8a8541673a..8c8712aa9551 100644 > --- a/arch/riscv/include/uapi/asm/sigcontext.h > +++ b/arch/riscv/include/uapi/asm/sigcontext.h > @@ -15,6 +15,8 @@ > /* The size of END signal context header. */ > #define END_HDR_SIZE 0x0 > > +#ifndef __ASSEMBLY__ > + > struct __sc_riscv_v_state { > struct __riscv_v_ext_state v_state; > } __attribute__((aligned(16))); > @@ -33,4 +35,6 @@ struct sigcontext { > }; > }; > > +#endif /*!__ASSEMBLY__*/ > + > #endif /* _UAPI_ASM_RISCV_SIGCONTEXT_H */ > -- > 2.40.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Tue, 20 Jun 2023 00:33:57 PDT (-0700), Conor Dooley wrote: > On Mon, Jun 19, 2023 at 10:21:01AM -0700, Palmer Dabbelt wrote: >> I get a few build failures along the lines of >> >> ./arch/riscv/include/uapi/asm/sigcontext.h:19:36: error: field ‘v_state’ has incomplete type >> 19 | struct __riscv_v_ext_state v_state; >> | ^~~~~~~ >> ./arch/riscv/include/uapi/asm/sigcontext.h:32:49: error: field ‘sc_extdesc’ has incomplete type >> 32 | struct __riscv_extra_ext_header sc_extdesc; >> >> The V structures in question are defined for !assembly, so let's just do >> so for the others. >> >> Fixes: 8ee0b41898fa ("riscv: signal: Add sigcontext save/restore for vector") >> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> > > Not the first time you've caught this sort of problem in headers, is > there a particular build that catches these? I think we're missing some sort of dependency somewhere, these assembly-related issues tend to only show up once when I'm doing dirty builds. I'd guess it's because I'm bouncing between trees and such, not 100% sure though. > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > Cheers, > Conor. > >> --- >> arch/riscv/include/uapi/asm/sigcontext.h | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/arch/riscv/include/uapi/asm/sigcontext.h b/arch/riscv/include/uapi/asm/sigcontext.h >> index 8b8a8541673a..8c8712aa9551 100644 >> --- a/arch/riscv/include/uapi/asm/sigcontext.h >> +++ b/arch/riscv/include/uapi/asm/sigcontext.h >> @@ -15,6 +15,8 @@ >> /* The size of END signal context header. */ >> #define END_HDR_SIZE 0x0 >> >> +#ifndef __ASSEMBLY__ >> + >> struct __sc_riscv_v_state { >> struct __riscv_v_ext_state v_state; >> } __attribute__((aligned(16))); >> @@ -33,4 +35,6 @@ struct sigcontext { >> }; >> }; >> >> +#endif /*!__ASSEMBLY__*/ >> + >> #endif /* _UAPI_ASM_RISCV_SIGCONTEXT_H */ >> -- >> 2.40.1 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
Hello: This patch was applied to riscv/linux.git (for-next) by Palmer Dabbelt <palmer@rivosinc.com>: On Mon, 19 Jun 2023 10:21:01 -0700 you wrote: > I get a few build failures along the lines of > > ./arch/riscv/include/uapi/asm/sigcontext.h:19:36: error: field ‘v_state’ has incomplete type > 19 | struct __riscv_v_ext_state v_state; > | ^~~~~~~ > ./arch/riscv/include/uapi/asm/sigcontext.h:32:49: error: field ‘sc_extdesc’ has incomplete type > 32 | struct __riscv_extra_ext_header sc_extdesc; > > [...] Here is the summary with links: - RISC-V: Fix up some vector state related build failures https://git.kernel.org/riscv/c/e50db34efdc8 You are awesome, thank you!
diff --git a/arch/riscv/include/uapi/asm/sigcontext.h b/arch/riscv/include/uapi/asm/sigcontext.h index 8b8a8541673a..8c8712aa9551 100644 --- a/arch/riscv/include/uapi/asm/sigcontext.h +++ b/arch/riscv/include/uapi/asm/sigcontext.h @@ -15,6 +15,8 @@ /* The size of END signal context header. */ #define END_HDR_SIZE 0x0 +#ifndef __ASSEMBLY__ + struct __sc_riscv_v_state { struct __riscv_v_ext_state v_state; } __attribute__((aligned(16))); @@ -33,4 +35,6 @@ struct sigcontext { }; }; +#endif /*!__ASSEMBLY__*/ + #endif /* _UAPI_ASM_RISCV_SIGCONTEXT_H */
I get a few build failures along the lines of ./arch/riscv/include/uapi/asm/sigcontext.h:19:36: error: field ‘v_state’ has incomplete type 19 | struct __riscv_v_ext_state v_state; | ^~~~~~~ ./arch/riscv/include/uapi/asm/sigcontext.h:32:49: error: field ‘sc_extdesc’ has incomplete type 32 | struct __riscv_extra_ext_header sc_extdesc; The V structures in question are defined for !assembly, so let's just do so for the others. Fixes: 8ee0b41898fa ("riscv: signal: Add sigcontext save/restore for vector") Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> --- arch/riscv/include/uapi/asm/sigcontext.h | 4 ++++ 1 file changed, 4 insertions(+)