diff mbox series

[4/4] dts: Reserve memory region for NSS and TZ

Message ID 20230623094403.3978838-5-quic_srichara@quicinc.com (mailing list archive)
State Changes Requested
Delegated to: Krzysztof WilczyƄski
Headers show
Series IPQ8074 pcie/wcss fixes | expand

Commit Message

Sricharan Ramabadhran June 23, 2023, 9:44 a.m. UTC
Add reserved memory region for NSS and fix the name
for tz region explicitly.

Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
---
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

Comments

Krzysztof Kozlowski June 23, 2023, 10:20 a.m. UTC | #1
On 23/06/2023 11:44, Sricharan Ramabadhran wrote:
> Add reserved memory region for NSS and fix the name
> for tz region explicitly.
> 
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>

Please use subject prefixes matching the subsystem. You can get them for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching.

Best regards,
Krzysztof
Konrad Dybcio June 23, 2023, 10:23 a.m. UTC | #2
On 23.06.2023 11:44, Sricharan Ramabadhran wrote:
> Add reserved memory region for NSS and fix the name
> for tz region explicitly.
> 
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
> ---
The commit title is divergent from what's in the commit message and
the patch body. Please separate these two changes.

>  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> index 791af73334cb..d51ff9b4f5c1 100644
> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> @@ -86,6 +86,11 @@ reserved-memory {
>  		#size-cells = <2>;
>  		ranges;
>  
> +		nss@40000000 {
> +			reg = <0x0 0x40000000 0x0 0x01000000>;
Drop the leading zeroes from the size part.

Konrad
> +			no-map;
> +		};
> +
>  		bootloader@4a600000 {
>  			reg = <0x0 0x4a600000 0x0 0x400000>;
>  			no-map;
> @@ -104,7 +109,7 @@ smem@4ab00000 {
>  			hwlocks = <&tcsr_mutex 0>;
>  		};
>  
> -		memory@4ac00000 {
> +		tz@4ac00000 {
>  			reg = <0x0 0x4ac00000 0x0 0x400000>;
>  			no-map;
>  		};
Sricharan Ramabadhran June 23, 2023, 10:44 a.m. UTC | #3
On 6/23/2023 3:50 PM, Krzysztof Kozlowski wrote:
> On 23/06/2023 11:44, Sricharan Ramabadhran wrote:
>> Add reserved memory region for NSS and fix the name
>> for tz region explicitly.
>>
>> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
> 
> Please use subject prefixes matching the subsystem. You can get them for
> example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
> your patch is touching.
> 

  Sure, will fix in V2

Regards,
  Sricharan
Sricharan Ramabadhran June 23, 2023, 10:45 a.m. UTC | #4
On 6/23/2023 3:53 PM, Konrad Dybcio wrote:
> On 23.06.2023 11:44, Sricharan Ramabadhran wrote:
>> Add reserved memory region for NSS and fix the name
>> for tz region explicitly.
>>
>> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
>> ---
> The commit title is divergent from what's in the commit message and
> the patch body. Please separate these two changes.
> 
  ok, will split.

>>   arch/arm64/boot/dts/qcom/ipq8074.dtsi | 7 ++++++-
>>   1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>> index 791af73334cb..d51ff9b4f5c1 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
>> @@ -86,6 +86,11 @@ reserved-memory {
>>   		#size-cells = <2>;
>>   		ranges;
>>   
>> +		nss@40000000 {
>> +			reg = <0x0 0x40000000 0x0 0x01000000>;
> Drop the leading zeroes from the size part.

  ok.

Regards,
  Sricharan
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 791af73334cb..d51ff9b4f5c1 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -86,6 +86,11 @@  reserved-memory {
 		#size-cells = <2>;
 		ranges;
 
+		nss@40000000 {
+			reg = <0x0 0x40000000 0x0 0x01000000>;
+			no-map;
+		};
+
 		bootloader@4a600000 {
 			reg = <0x0 0x4a600000 0x0 0x400000>;
 			no-map;
@@ -104,7 +109,7 @@  smem@4ab00000 {
 			hwlocks = <&tcsr_mutex 0>;
 		};
 
-		memory@4ac00000 {
+		tz@4ac00000 {
 			reg = <0x0 0x4ac00000 0x0 0x400000>;
 			no-map;
 		};