[v2,0/8] PCI: microchip: Fixes and clean-ups

Message

Daire McNamara June 30, 2023, 3:48 p.m. UTC

From: Daire McNamara <[e-mail]>

This patch series contains fixes and clean-ups for the Microchip PolarFire SoC PCIe driver

These patches are extracted from the link below to separate them from the outbound and inbound
range handling which is taking considerable time.
Link: https://lore.kernel.org/linux-riscv/[e-mail]/

These patches are regenerated on v6.4-rc6.

Main Changes from v1:
- Dropped "Remove cast warning for devm_add_action_or_reset()". This
  has been overtaken by a patch series from Krzysztof Wilczynski.
- Improved the comment for "Enable building driver as a module" to
  clarify what enables building the driver as a module.
- Split "Gather MSI information from hardware config registers",
  for clarity, into:
   - "Gather MSI information from hardware config registers" purely
      changing the of source of MSI-related information (Num MSIs and
      MSI address) from #defines (which can be incorrect) to FPGA
      configuration registers (which is the ultimate source of truth),
      and a
   - "Rename and refactor ..." patch as a function's code is now clearly
      unrelated to its current name.

cc: Conor Dooley <[e-mail]>
cc: Lorenzo Pieralisi <[e-mail]>
cc: "Krzysztof Wilczyński" <[e-mail]>
cc: Rob Herring <[e-mail]>
cc: Bjorn Helgaas <[e-mail]>
cc: [e-mail]
cc: [e-mail]

Daire McNamara (8):
  PCI: microchip: Correct the DED and SEC interrupt bit offsets
  PCI: microchip: Enable building driver as a module
  PCI: microchip: Align register, offset, and mask names with hw docs
  PCI: microchip: Enable event handlers to access bridge and ctrl ptrs
  PCI: microchip: Clean up initialisation of interrupts
  PCI: microchip: Gather MSI information from hardware config registers
  PCI: microchip: Rename and refactor mc_pcie_enable_msi()
  PCI: microchip: Re-partition code between probe() and init()

 drivers/pci/controller/Kconfig               |   2 +-
 drivers/pci/controller/pcie-microchip-host.c | 402 +++++++++++--------
 2 files changed, 238 insertions(+), 166 deletions(-)


base-commit: 858fd168a95c5b9669aac8db6c14a9aeab446375

Comments

Conor Dooley July 19, 2023, 5 p.m. UTC | #1

Hey folks,

On Fri, Jun 30, 2023 at 04:48:51PM +0100, [e-mail] wrote:
> From: Daire McNamara <[e-mail]>
> 
> This patch series contains fixes and clean-ups for the Microchip PolarFire SoC PCIe driver
> 
> These patches are extracted from the link below to separate them from the outbound and inbound
> range handling which is taking considerable time.
> Link: https://lore.kernel.org/linux-riscv/[e-mail]/
> 
> These patches are regenerated on v6.4-rc6.
> 
> Main Changes from v1:
> - Dropped "Remove cast warning for devm_add_action_or_reset()". This
>   has been overtaken by a patch series from Krzysztof Wilczynski.
> - Improved the comment for "Enable building driver as a module" to
>   clarify what enables building the driver as a module.
> - Split "Gather MSI information from hardware config registers",
>   for clarity, into:
>    - "Gather MSI information from hardware config registers" purely
>       changing the of source of MSI-related information (Num MSIs and
>       MSI address) from #defines (which can be incorrect) to FPGA
>       configuration registers (which is the ultimate source of truth),
>       and a
>    - "Rename and refactor ..." patch as a function's code is now clearly
>       unrelated to its current name.

This series has been sitting with reviews (albeit from myself) for a
couple of weeks. What's missing to get this series picked up?

Thanks,
Conor.

> cc: Conor Dooley <[e-mail]>
> cc: Lorenzo Pieralisi <[e-mail]>
> cc: "Krzysztof Wilczyński" <[e-mail]>
> cc: Rob Herring <[e-mail]>
> cc: Bjorn Helgaas <[e-mail]>
> cc: [e-mail]
> cc: [e-mail]
> 
> Daire McNamara (8):
>   PCI: microchip: Correct the DED and SEC interrupt bit offsets
>   PCI: microchip: Enable building driver as a module
>   PCI: microchip: Align register, offset, and mask names with hw docs
>   PCI: microchip: Enable event handlers to access bridge and ctrl ptrs
>   PCI: microchip: Clean up initialisation of interrupts
>   PCI: microchip: Gather MSI information from hardware config registers
>   PCI: microchip: Rename and refactor mc_pcie_enable_msi()
>   PCI: microchip: Re-partition code between probe() and init()
> 
>  drivers/pci/controller/Kconfig               |   2 +-
>  drivers/pci/controller/pcie-microchip-host.c | 402 +++++++++++--------
>  2 files changed, 238 insertions(+), 166 deletions(-)
> 
> 
> base-commit: 858fd168a95c5b9669aac8db6c14a9aeab446375
> -- 
> 2.25.1
>

Lorenzo Pieralisi July 20, 2023, 8:07 a.m. UTC | #2

On Wed, Jul 19, 2023 at 06:00:37PM +0100, Conor Dooley wrote:
> Hey folks,
> 
> On Fri, Jun 30, 2023 at 04:48:51PM +0100, [e-mail] wrote:
> > From: Daire McNamara <[e-mail]>
> > 
> > This patch series contains fixes and clean-ups for the Microchip PolarFire SoC PCIe driver
> > 
> > These patches are extracted from the link below to separate them from the outbound and inbound
> > range handling which is taking considerable time.
> > Link: https://lore.kernel.org/linux-riscv/[e-mail]/
> > 
> > These patches are regenerated on v6.4-rc6.
> > 
> > Main Changes from v1:
> > - Dropped "Remove cast warning for devm_add_action_or_reset()". This
> >   has been overtaken by a patch series from Krzysztof Wilczynski.
> > - Improved the comment for "Enable building driver as a module" to
> >   clarify what enables building the driver as a module.
> > - Split "Gather MSI information from hardware config registers",
> >   for clarity, into:
> >    - "Gather MSI information from hardware config registers" purely
> >       changing the of source of MSI-related information (Num MSIs and
> >       MSI address) from #defines (which can be incorrect) to FPGA
> >       configuration registers (which is the ultimate source of truth),
> >       and a
> >    - "Rename and refactor ..." patch as a function's code is now clearly
> >       unrelated to its current name.
> 
> This series has been sitting with reviews (albeit from myself) for a
> couple of weeks. What's missing to get this series picked up?

We are at v6.5-rc2 - fixes are not urgent, there is nothing missing
other than us going through the patch queue and review it/pick it up.

Thanks,
Lorenzo

> Thanks,
> Conor.
> 
> > cc: Conor Dooley <[e-mail]>
> > cc: Lorenzo Pieralisi <[e-mail]>
> > cc: "Krzysztof Wilczyński" <[e-mail]>
> > cc: Rob Herring <[e-mail]>
> > cc: Bjorn Helgaas <[e-mail]>
> > cc: [e-mail]
> > cc: [e-mail]
> > 
> > Daire McNamara (8):
> >   PCI: microchip: Correct the DED and SEC interrupt bit offsets
> >   PCI: microchip: Enable building driver as a module
> >   PCI: microchip: Align register, offset, and mask names with hw docs
> >   PCI: microchip: Enable event handlers to access bridge and ctrl ptrs
> >   PCI: microchip: Clean up initialisation of interrupts
> >   PCI: microchip: Gather MSI information from hardware config registers
> >   PCI: microchip: Rename and refactor mc_pcie_enable_msi()
> >   PCI: microchip: Re-partition code between probe() and init()
> > 
> >  drivers/pci/controller/Kconfig               |   2 +-
> >  drivers/pci/controller/pcie-microchip-host.c | 402 +++++++++++--------
> >  2 files changed, 238 insertions(+), 166 deletions(-)
> > 
> > 
> > base-commit: 858fd168a95c5b9669aac8db6c14a9aeab446375
> > -- 
> > 2.25.1
> >