| Message ID | mhng-c2fd272b-44d6-4174-9b97-3a253656e4ce@palmer-ri-x1c9 (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | [GIT,PULL] RISC-V Fixes for 6.5-rc6 | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/apply | fail | Pull to for-next failed |
| conchuod/tree_selection | success | Pull request for for-next |
The pull request you sent on Fri, 11 Aug 2023 08:41:34 -0700 (PDT):
> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.5-rc6
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/2a3c17edbf53816ba61746c38833b48c73ee2a16
Thank you!
The following changes since commit 640c503d7dbd7d34a62099c933f4db0ed77ccbec: Documentation: kdump: Add va_kernel_pa_offset for RISCV64 (2023-08-02 13:50:37 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.5-rc6 for you to fetch changes up to 7e3811521dc3934e2ecae8458676fc4a1f62bf9f: riscv: Implement flush_cache_vmap() (2023-08-10 08:54:29 -0700) ---------------------------------------------------------------- RISC-V Fixes for 6.5-rc6 * Fixes for a pair of kexec_file_load() failures. * A fix to ensure the direct mapping is PMD-aligned. * A fix for CPU feature detection on SMP=n * The MMIO ordering fences have been strengthened to ensure ordering WRT delay(). * Fixes for a pair of -Wmissing-variable-declarations warnings. * A fix to avoid PUD mappings in vmap on sv39. * flush_cache_vmap() now flushes the TLB to avoid issues on systems that cache invalid mappings. ---------------------------------------------------------------- Alexandre Ghiti (3): riscv: Start of DRAM should at least be aligned on PMD size for the direct mapping riscv: Do not allow vmap pud mappings for 3-level page table riscv: Implement flush_cache_vmap() Andrea Parri (1): riscv,mmio: Fix readX()-to-delay() ordering Nick Desaulniers (1): riscv: mm: fix 2 instances of -Wmissing-variable-declarations Palmer Dabbelt (1): Merge patch series "RISC-V: Fix a few kexec_file_load(2) failures" Samuel Holland (1): riscv: Fix CPU feature detection with SMP disabled Torsten Duwe (2): riscv/kexec: handle R_RISCV_CALL_PLT relocation type riscv/kexec: load initrd high in available memory arch/riscv/include/asm/cacheflush.h | 4 ++++ arch/riscv/include/asm/mmio.h | 16 ++++++++-------- arch/riscv/include/asm/pgtable.h | 2 ++ arch/riscv/include/asm/vmalloc.h | 4 +++- arch/riscv/kernel/cpu.c | 5 +++++ arch/riscv/kernel/elf_kexec.c | 3 ++- arch/riscv/kernel/smp.c | 5 ----- arch/riscv/mm/init.c | 16 +++++++++++----- arch/riscv/mm/kasan_init.c | 1 - 9 files changed, 35 insertions(+), 21 deletions(-)