| Message ID | 20231026151828.754279-9-max.chou@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Update RISC-V vector crypto to ratified v1.0.0 | expand |
On 10/26/23 12:18, Max Chou wrote: > Vector crypto spec defines the ShangMi algorithm suite related > extensions (Zvks, Zvksc, Zvksg) combined by several vector crypto > extensions. > > Signed-off-by: Max Chou <max.chou@sifive.com> > --- Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > target/riscv/cpu_cfg.h | 3 +++ > target/riscv/tcg/tcg-cpu.c | 17 +++++++++++++++++ > 2 files changed, 20 insertions(+) > > diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h > index fd07aa96a27..7b0ca657a6a 100644 > --- a/target/riscv/cpu_cfg.h > +++ b/target/riscv/cpu_cfg.h > @@ -99,6 +99,9 @@ struct RISCVCPUConfig { > bool ext_zvkn; > bool ext_zvknc; > bool ext_zvkng; > + bool ext_zvks; > + bool ext_zvksc; > + bool ext_zvksg; > bool ext_zmmul; > bool ext_zvfbfmin; > bool ext_zvfbfwma; > diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c > index e460701a13c..f9023ca75c7 100644 > --- a/target/riscv/tcg/tcg-cpu.c > +++ b/target/riscv/tcg/tcg-cpu.c > @@ -519,6 +519,23 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp) > cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkt), true); > } > > + if (cpu->cfg.ext_zvksc) { > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvks), true); > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true); > + } > + > + if (cpu->cfg.ext_zvksg) { > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvks), true); > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkg), true); > + } > + > + if (cpu->cfg.ext_zvks) { > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvksed), true); > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvksh), true); > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkb), true); > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkt), true); > + } > + > if (cpu->cfg.ext_zvkt) { > cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbb), true); > cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true);
On Fri, Oct 27, 2023 at 1:21 AM Max Chou <max.chou@sifive.com> wrote: > > Vector crypto spec defines the ShangMi algorithm suite related > extensions (Zvks, Zvksc, Zvksg) combined by several vector crypto > extensions. > > Signed-off-by: Max Chou <max.chou@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/cpu_cfg.h | 3 +++ > target/riscv/tcg/tcg-cpu.c | 17 +++++++++++++++++ > 2 files changed, 20 insertions(+) > > diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h > index fd07aa96a27..7b0ca657a6a 100644 > --- a/target/riscv/cpu_cfg.h > +++ b/target/riscv/cpu_cfg.h > @@ -99,6 +99,9 @@ struct RISCVCPUConfig { > bool ext_zvkn; > bool ext_zvknc; > bool ext_zvkng; > + bool ext_zvks; > + bool ext_zvksc; > + bool ext_zvksg; > bool ext_zmmul; > bool ext_zvfbfmin; > bool ext_zvfbfwma; > diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c > index e460701a13c..f9023ca75c7 100644 > --- a/target/riscv/tcg/tcg-cpu.c > +++ b/target/riscv/tcg/tcg-cpu.c > @@ -519,6 +519,23 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp) > cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkt), true); > } > > + if (cpu->cfg.ext_zvksc) { > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvks), true); > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true); > + } > + > + if (cpu->cfg.ext_zvksg) { > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvks), true); > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkg), true); > + } > + > + if (cpu->cfg.ext_zvks) { > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvksed), true); > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvksh), true); > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkb), true); > + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkt), true); > + } > + > if (cpu->cfg.ext_zvkt) { > cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbb), true); > cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true); > -- > 2.34.1 > >
diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h index fd07aa96a27..7b0ca657a6a 100644 --- a/target/riscv/cpu_cfg.h +++ b/target/riscv/cpu_cfg.h @@ -99,6 +99,9 @@ struct RISCVCPUConfig { bool ext_zvkn; bool ext_zvknc; bool ext_zvkng; + bool ext_zvks; + bool ext_zvksc; + bool ext_zvksg; bool ext_zmmul; bool ext_zvfbfmin; bool ext_zvfbfwma; diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index e460701a13c..f9023ca75c7 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -519,6 +519,23 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, Error **errp) cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkt), true); } + if (cpu->cfg.ext_zvksc) { + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvks), true); + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true); + } + + if (cpu->cfg.ext_zvksg) { + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvks), true); + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkg), true); + } + + if (cpu->cfg.ext_zvks) { + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvksed), true); + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvksh), true); + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkb), true); + cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkt), true); + } + if (cpu->cfg.ext_zvkt) { cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbb), true); cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true);
Vector crypto spec defines the ShangMi algorithm suite related extensions (Zvks, Zvksc, Zvksg) combined by several vector crypto extensions. Signed-off-by: Max Chou <max.chou@sifive.com> --- target/riscv/cpu_cfg.h | 3 +++ target/riscv/tcg/tcg-cpu.c | 17 +++++++++++++++++ 2 files changed, 20 insertions(+)