Show patches with: Submitter = Max Chou       |    State = Action Required       |    Archived = No       |   16 patches
Patch Series A/R/T S/W/F Date Submitter Delegate State
[RFC,v4,5/5] target/riscv: Inline unit-stride ld/st and corresponding functions for performance Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - 1 - --- 2024-06-13 Max Chou New
[RFC,v4,4/5] target/riscv: rvv: Provide group continuous ld/st flow for unit-stride ld/st instructi… Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-06-13 Max Chou New
[RFC,v4,3/5] target/riscv: rvv: Provide a fast path using direct access to host ram for unit-stride… Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-06-13 Max Chou New
[RFC,v4,2/5] target/riscv: rvv: Provide a fast path using direct access to host ram for unmasked un… Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-06-13 Max Chou New
[RFC,v4,1/5] accel/tcg: Avoid unnecessary call overhead from qemu_plugin_vcpu_mem_cb Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - 2 - --- 2024-06-13 Max Chou New
[RFC,v3,5/5] target/riscv: Inline unit-stride ld/st and corresponding functions for performance Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-06-13 Max Chou New
[RFC,v3,4/5] target/riscv: rvv: Provide group continuous ld/st flow for unit-stride ld/st instructi… Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-06-13 Max Chou New
[RFC,v3,3/5] target/riscv: rvv: Provide a fast path using direct access to host ram for unit-stride… Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-06-13 Max Chou New
[RFC,v3,2/5] target/riscv: rvv: Provide a fast path using direct access to host ram for unmasked un… Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-06-13 Max Chou New
[RFC,v3,1/5] accel/tcg: Avoid unnecessary call overhead from qemu_plugin_vcpu_mem_cb Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-06-13 Max Chou New
[RFC,v2,6/6] target/riscv: rvv: Optimize vl8re8.v/vs8r.v with limitations Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-05-31 Max Chou New
[RFC,v2,5/6] target/riscv: rvv: Optimize v[l|s]e8.v with limitations Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-05-31 Max Chou New
[RFC,v2,4/6] target/riscv: Add check_probe_[read|write] helper functions Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-05-31 Max Chou New
[RFC,v2,3/6] target/riscv: Inline vext_ldst_us and corresponding function for performance Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - 1 - --- 2024-05-31 Max Chou New
[RFC,v2,2/6] accel/tcg: Avoid unnecessary call overhead from qemu_plugin_vcpu_mem_cb Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-05-31 Max Chou New
[RFC,v2,1/6] target/riscv: Separate vector segment ld/st instructions Improve the performance of RISC-V vector unit-stride/whole register ld/st instructions - - - --- 2024-05-31 Max Chou New