| Message ID | 20231026151828.754279-11-max.chou@sifive.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Update RISC-V vector crypto to ratified v1.0.0 | expand |
On 10/26/23 12:18, Max Chou wrote: > Because the vector crypto specification is ratified, so move theses > extensions from riscv_cpu_experimental_exts to riscv_cpu_extensions. > > Signed-off-by: Max Chou <max.chou@sifive.com> > --- Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > target/riscv/cpu.c | 36 ++++++++++++++++++------------------ > 1 file changed, 18 insertions(+), 18 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 1709df76a9b..5b5805399ee 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -1342,6 +1342,24 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { > MULTI_EXT_CFG_BOOL("zcmt", ext_zcmt, false), > MULTI_EXT_CFG_BOOL("zicond", ext_zicond, false), > > + /* Vector cryptography extensions */ > + MULTI_EXT_CFG_BOOL("zvbb", ext_zvbb, false), > + MULTI_EXT_CFG_BOOL("zvbc", ext_zvbc, false), > + MULTI_EXT_CFG_BOOL("zvkb", ext_zvkg, false), > + MULTI_EXT_CFG_BOOL("zvkg", ext_zvkg, false), > + MULTI_EXT_CFG_BOOL("zvkned", ext_zvkned, false), > + MULTI_EXT_CFG_BOOL("zvknha", ext_zvknha, false), > + MULTI_EXT_CFG_BOOL("zvknhb", ext_zvknhb, false), > + MULTI_EXT_CFG_BOOL("zvksed", ext_zvksed, false), > + MULTI_EXT_CFG_BOOL("zvksh", ext_zvksh, false), > + MULTI_EXT_CFG_BOOL("zvkt", ext_zvkt, false), > + MULTI_EXT_CFG_BOOL("zvkn", ext_zvkn, false), > + MULTI_EXT_CFG_BOOL("zvknc", ext_zvknc, false), > + MULTI_EXT_CFG_BOOL("zvkng", ext_zvkng, false), > + MULTI_EXT_CFG_BOOL("zvks", ext_zvks, false), > + MULTI_EXT_CFG_BOOL("zvksc", ext_zvksc, false), > + MULTI_EXT_CFG_BOOL("zvksg", ext_zvksg, false), > + > DEFINE_PROP_END_OF_LIST(), > }; > > @@ -1374,24 +1392,6 @@ const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { > MULTI_EXT_CFG_BOOL("x-zvfbfmin", ext_zvfbfmin, false), > MULTI_EXT_CFG_BOOL("x-zvfbfwma", ext_zvfbfwma, false), > > - /* Vector cryptography extensions */ > - MULTI_EXT_CFG_BOOL("x-zvbb", ext_zvbb, false), > - MULTI_EXT_CFG_BOOL("x-zvbc", ext_zvbc, false), > - MULTI_EXT_CFG_BOOL("x-zvkb", ext_zvkg, false), > - MULTI_EXT_CFG_BOOL("x-zvkg", ext_zvkg, false), > - MULTI_EXT_CFG_BOOL("x-zvkned", ext_zvkned, false), > - MULTI_EXT_CFG_BOOL("x-zvknha", ext_zvknha, false), > - MULTI_EXT_CFG_BOOL("x-zvknhb", ext_zvknhb, false), > - MULTI_EXT_CFG_BOOL("x-zvksed", ext_zvksed, false), > - MULTI_EXT_CFG_BOOL("x-zvksh", ext_zvksh, false), > - MULTI_EXT_CFG_BOOL("x-zvkt", ext_zvkt, false), > - MULTI_EXT_CFG_BOOL("x-zvkn", ext_zvkn, false), > - MULTI_EXT_CFG_BOOL("x-zvknc", ext_zvknc, false), > - MULTI_EXT_CFG_BOOL("x-zvkng", ext_zvkng, false), > - MULTI_EXT_CFG_BOOL("x-zvks", ext_zvks, false), > - MULTI_EXT_CFG_BOOL("x-zvksc", ext_zvksc, false), > - MULTI_EXT_CFG_BOOL("x-zvksg", ext_zvksg, false), > - > DEFINE_PROP_END_OF_LIST(), > }; >
On Fri, Oct 27, 2023 at 1:22 AM Max Chou <max.chou@sifive.com> wrote: > > Because the vector crypto specification is ratified, so move theses > extensions from riscv_cpu_experimental_exts to riscv_cpu_extensions. > > Signed-off-by: Max Chou <max.chou@sifive.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/cpu.c | 36 ++++++++++++++++++------------------ > 1 file changed, 18 insertions(+), 18 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 1709df76a9b..5b5805399ee 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -1342,6 +1342,24 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { > MULTI_EXT_CFG_BOOL("zcmt", ext_zcmt, false), > MULTI_EXT_CFG_BOOL("zicond", ext_zicond, false), > > + /* Vector cryptography extensions */ > + MULTI_EXT_CFG_BOOL("zvbb", ext_zvbb, false), > + MULTI_EXT_CFG_BOOL("zvbc", ext_zvbc, false), > + MULTI_EXT_CFG_BOOL("zvkb", ext_zvkg, false), > + MULTI_EXT_CFG_BOOL("zvkg", ext_zvkg, false), > + MULTI_EXT_CFG_BOOL("zvkned", ext_zvkned, false), > + MULTI_EXT_CFG_BOOL("zvknha", ext_zvknha, false), > + MULTI_EXT_CFG_BOOL("zvknhb", ext_zvknhb, false), > + MULTI_EXT_CFG_BOOL("zvksed", ext_zvksed, false), > + MULTI_EXT_CFG_BOOL("zvksh", ext_zvksh, false), > + MULTI_EXT_CFG_BOOL("zvkt", ext_zvkt, false), > + MULTI_EXT_CFG_BOOL("zvkn", ext_zvkn, false), > + MULTI_EXT_CFG_BOOL("zvknc", ext_zvknc, false), > + MULTI_EXT_CFG_BOOL("zvkng", ext_zvkng, false), > + MULTI_EXT_CFG_BOOL("zvks", ext_zvks, false), > + MULTI_EXT_CFG_BOOL("zvksc", ext_zvksc, false), > + MULTI_EXT_CFG_BOOL("zvksg", ext_zvksg, false), > + > DEFINE_PROP_END_OF_LIST(), > }; > > @@ -1374,24 +1392,6 @@ const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { > MULTI_EXT_CFG_BOOL("x-zvfbfmin", ext_zvfbfmin, false), > MULTI_EXT_CFG_BOOL("x-zvfbfwma", ext_zvfbfwma, false), > > - /* Vector cryptography extensions */ > - MULTI_EXT_CFG_BOOL("x-zvbb", ext_zvbb, false), > - MULTI_EXT_CFG_BOOL("x-zvbc", ext_zvbc, false), > - MULTI_EXT_CFG_BOOL("x-zvkb", ext_zvkg, false), > - MULTI_EXT_CFG_BOOL("x-zvkg", ext_zvkg, false), > - MULTI_EXT_CFG_BOOL("x-zvkned", ext_zvkned, false), > - MULTI_EXT_CFG_BOOL("x-zvknha", ext_zvknha, false), > - MULTI_EXT_CFG_BOOL("x-zvknhb", ext_zvknhb, false), > - MULTI_EXT_CFG_BOOL("x-zvksed", ext_zvksed, false), > - MULTI_EXT_CFG_BOOL("x-zvksh", ext_zvksh, false), > - MULTI_EXT_CFG_BOOL("x-zvkt", ext_zvkt, false), > - MULTI_EXT_CFG_BOOL("x-zvkn", ext_zvkn, false), > - MULTI_EXT_CFG_BOOL("x-zvknc", ext_zvknc, false), > - MULTI_EXT_CFG_BOOL("x-zvkng", ext_zvkng, false), > - MULTI_EXT_CFG_BOOL("x-zvks", ext_zvks, false), > - MULTI_EXT_CFG_BOOL("x-zvksc", ext_zvksc, false), > - MULTI_EXT_CFG_BOOL("x-zvksg", ext_zvksg, false), > - > DEFINE_PROP_END_OF_LIST(), > }; > > -- > 2.34.1 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 1709df76a9b..5b5805399ee 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1342,6 +1342,24 @@ const RISCVCPUMultiExtConfig riscv_cpu_extensions[] = { MULTI_EXT_CFG_BOOL("zcmt", ext_zcmt, false), MULTI_EXT_CFG_BOOL("zicond", ext_zicond, false), + /* Vector cryptography extensions */ + MULTI_EXT_CFG_BOOL("zvbb", ext_zvbb, false), + MULTI_EXT_CFG_BOOL("zvbc", ext_zvbc, false), + MULTI_EXT_CFG_BOOL("zvkb", ext_zvkg, false), + MULTI_EXT_CFG_BOOL("zvkg", ext_zvkg, false), + MULTI_EXT_CFG_BOOL("zvkned", ext_zvkned, false), + MULTI_EXT_CFG_BOOL("zvknha", ext_zvknha, false), + MULTI_EXT_CFG_BOOL("zvknhb", ext_zvknhb, false), + MULTI_EXT_CFG_BOOL("zvksed", ext_zvksed, false), + MULTI_EXT_CFG_BOOL("zvksh", ext_zvksh, false), + MULTI_EXT_CFG_BOOL("zvkt", ext_zvkt, false), + MULTI_EXT_CFG_BOOL("zvkn", ext_zvkn, false), + MULTI_EXT_CFG_BOOL("zvknc", ext_zvknc, false), + MULTI_EXT_CFG_BOOL("zvkng", ext_zvkng, false), + MULTI_EXT_CFG_BOOL("zvks", ext_zvks, false), + MULTI_EXT_CFG_BOOL("zvksc", ext_zvksc, false), + MULTI_EXT_CFG_BOOL("zvksg", ext_zvksg, false), + DEFINE_PROP_END_OF_LIST(), }; @@ -1374,24 +1392,6 @@ const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { MULTI_EXT_CFG_BOOL("x-zvfbfmin", ext_zvfbfmin, false), MULTI_EXT_CFG_BOOL("x-zvfbfwma", ext_zvfbfwma, false), - /* Vector cryptography extensions */ - MULTI_EXT_CFG_BOOL("x-zvbb", ext_zvbb, false), - MULTI_EXT_CFG_BOOL("x-zvbc", ext_zvbc, false), - MULTI_EXT_CFG_BOOL("x-zvkb", ext_zvkg, false), - MULTI_EXT_CFG_BOOL("x-zvkg", ext_zvkg, false), - MULTI_EXT_CFG_BOOL("x-zvkned", ext_zvkned, false), - MULTI_EXT_CFG_BOOL("x-zvknha", ext_zvknha, false), - MULTI_EXT_CFG_BOOL("x-zvknhb", ext_zvknhb, false), - MULTI_EXT_CFG_BOOL("x-zvksed", ext_zvksed, false), - MULTI_EXT_CFG_BOOL("x-zvksh", ext_zvksh, false), - MULTI_EXT_CFG_BOOL("x-zvkt", ext_zvkt, false), - MULTI_EXT_CFG_BOOL("x-zvkn", ext_zvkn, false), - MULTI_EXT_CFG_BOOL("x-zvknc", ext_zvknc, false), - MULTI_EXT_CFG_BOOL("x-zvkng", ext_zvkng, false), - MULTI_EXT_CFG_BOOL("x-zvks", ext_zvks, false), - MULTI_EXT_CFG_BOOL("x-zvksc", ext_zvksc, false), - MULTI_EXT_CFG_BOOL("x-zvksg", ext_zvksg, false), - DEFINE_PROP_END_OF_LIST(), };
Because the vector crypto specification is ratified, so move theses extensions from riscv_cpu_experimental_exts to riscv_cpu_extensions. Signed-off-by: Max Chou <max.chou@sifive.com> --- target/riscv/cpu.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-)