diff mbox series

[11/11] drm/i915/dp_mst: Add support for forcing dsc fractional bpp via debugfs

Message ID 20231110101020.4067342-12-ankit.k.nautiyal@intel.com (mailing list archive)
State New, archived
Headers show
Series Add DSC fractional bpp support | expand

Commit Message

Nautiyal, Ankit K Nov. 10, 2023, 10:10 a.m. UTC
If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff
compressed bpp is fractional. Continue if the computed compressed bpp
turns out to be a integer.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

Comments

Kandpal, Suraj Nov. 12, 2023, 5 a.m. UTC | #1
> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> Sent: Friday, November 10, 2023 3:40 PM
> To: dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Sharma, Swati2 <swati2.sharma@intel.com>; Kulkarni, Vandita
> <vandita.kulkarni@intel.com>; Kandpal, Suraj <suraj.kandpal@intel.com>;
> suijingfeng@loongson.cn
> Subject: [PATCH 11/11] drm/i915/dp_mst: Add support for forcing dsc
> fractional bpp via debugfs
> 
> If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff
> compressed bpp is fractional. Continue if the computed compressed bpp
> turns out to be a integer.
> 

LGTM.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>

> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 14 +++++++++++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 322046bb7d42..26b51ba6871d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -172,6 +172,10 @@ static int
> intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
>  		struct intel_link_m_n remote_m_n;
>  		int link_bpp_x16;
> 
> +		if (dsc && intel_dp->force_dsc_fractional_bpp_en &&
> +		    !to_bpp_frac(bpp_x16))
> +			continue;
> +
>  		drm_dbg_kms(&i915->drm, "Trying bpp " BPP_X16_FMT "\n",
> BPP_X16_ARGS(bpp_x16));
> 
>  		ret = intel_dp_mst_check_constraints(i915, bpp_x16,
> adjusted_mode, crtc_state, dsc); @@ -225,12 +229,16 @@ static int
> intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
>  		drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
>  			    slots);
>  	} else {
> -		if (!dsc)
> -			crtc_state->pipe_bpp = to_bpp_int(bpp_x16);
> -		else
> +		if (dsc) {
>  			crtc_state->dsc.compressed_bpp_x16 = bpp_x16;
> +			if (intel_dp->force_dsc_fractional_bpp_en &&
> to_bpp_frac(bpp_x16))
> +				drm_dbg_kms(&i915->drm, "Forcing DSC
> fractional bpp\n");
> +		} else {
> +			crtc_state->pipe_bpp = to_bpp_int(bpp_x16);
> +		}
>  		drm_dbg_kms(&i915->drm, "Got %d slots for pipe bpp "
> BPP_X16_FMT " dsc %d\n",
>  			    slots, BPP_X16_ARGS(bpp_x16), dsc);
> +
>  	}
> 
>  	return slots;
> --
> 2.40.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 322046bb7d42..26b51ba6871d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -172,6 +172,10 @@  static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 		struct intel_link_m_n remote_m_n;
 		int link_bpp_x16;
 
+		if (dsc && intel_dp->force_dsc_fractional_bpp_en &&
+		    !to_bpp_frac(bpp_x16))
+			continue;
+
 		drm_dbg_kms(&i915->drm, "Trying bpp " BPP_X16_FMT "\n", BPP_X16_ARGS(bpp_x16));
 
 		ret = intel_dp_mst_check_constraints(i915, bpp_x16, adjusted_mode, crtc_state, dsc);
@@ -225,12 +229,16 @@  static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
 		drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
 			    slots);
 	} else {
-		if (!dsc)
-			crtc_state->pipe_bpp = to_bpp_int(bpp_x16);
-		else
+		if (dsc) {
 			crtc_state->dsc.compressed_bpp_x16 = bpp_x16;
+			if (intel_dp->force_dsc_fractional_bpp_en && to_bpp_frac(bpp_x16))
+				drm_dbg_kms(&i915->drm, "Forcing DSC fractional bpp\n");
+		} else {
+			crtc_state->pipe_bpp = to_bpp_int(bpp_x16);
+		}
 		drm_dbg_kms(&i915->drm, "Got %d slots for pipe bpp " BPP_X16_FMT " dsc %d\n",
 			    slots, BPP_X16_ARGS(bpp_x16), dsc);
+
 	}
 
 	return slots;