[00/15] pciutils: Add utility for Lane Margining

Message

Nikita Proshkin Dec. 8, 2023, 9:17 a.m. UTC

PCIe Gen 4 spec introduced new extended capability mandatory for all
ports - Lane Margining at the Receiver. This new feature allows to get an
approximation of the Link eye margin diagram by four points. This
information shows how resistant the Link is to external influences and can
be useful for link debugging and presets tuning.
Previously, this information was only available using a hardware debugger.

Patch series consists of two parts:

* Patch for lspci to add Margining registers reading. There is not much
  information available without issuing any margining commands, but this
  info is useful anyway;
* New pcilmr utility.

Margining capability assumes the exchange of commands with the device, so
its support was implemented as a separate utility pcilmr.
The pcilmr allows you to test Links and supports all the features provided
by the Margining capability. The utility is written using a pcilib, it is
divided into a library part and a main function with arguments parsing in
the pciutils root dir.
Man page is provided as well.

Utility compilation and man page preparation are integrated into the
pciutils Makefile, so run make is enough to start testing the utility
(Gen 4/5 device is required though).
Utility was written with Linux in mind and was tested only on this OS.

Example utility results on different systems you can see in gist:
https://gist.github.com/bombanya/f2b15263712757ffba1a11eea011c419

Patch series is also posted as PR on pciutils github:
https://github.com/pciutils/pciutils/pull/162

Nikita Proshkin (15):
  pciutils-lspci: Fix unsynchronized caches in lspci struct device and
    pci struct pci_dev
  pciutils: Add constants for Lane Margining at the Receiver Extended
    Capability
  pciutils-lspci: Add Lane Margining support to the lspci
  pciutils-pcilmr: Add functions for device checking and preparations
    before main margining processes
  pciutils-pcilmr: Add margining process functions
  pciutils-pcilmr: Add logging functions for margining
  pciutils-pcilmr: Add all-in-one device margining parameters reading
    function
  pciutils-pcilmr: Add function for default margining results log
  pciutils-pcilmr: Add utility main function
  pciutils-pcilmr: Add support for unique hardware quirks
  pciutils-pcilmr: Add the ability to pass multiple links to the utility
  pciutils-pcilmr: Add --scan mode to search for all LMR-capable Links
  pciutils-pcilmr: Add option to save margining results in csv form
  pciutils-pcilmr: Add handling of situations when device reports its
    MaxOffset values equal to 0
  pciutils-pcilmr: Add pcilmr man page

 Makefile                 |  11 +-
 lib/header.h             |   7 +
 lmr_lib/Makefile         |  10 +
 lmr_lib/margin.c         | 528 ++++++++++++++++++++++++++++++++++++++
 lmr_lib/margin.h         | 206 +++++++++++++++
 lmr_lib/margin_hw.c      | 163 ++++++++++++
 lmr_lib/margin_hw.h      |  46 ++++
 lmr_lib/margin_log.c     | 141 +++++++++++
 lmr_lib/margin_log.h     |  23 ++
 lmr_lib/margin_results.c | 255 +++++++++++++++++++
 lmr_lib/margin_results.h |  15 ++
 ls-ecaps.c               |  22 +-
 lspci.c                  |   1 +
 pcilmr.c                 | 532 +++++++++++++++++++++++++++++++++++++++
 pcilmr.man               | 179 +++++++++++++
 15 files changed, 2136 insertions(+), 3 deletions(-)
 create mode 100644 lmr_lib/Makefile
 create mode 100644 lmr_lib/margin.c
 create mode 100644 lmr_lib/margin.h
 create mode 100644 lmr_lib/margin_hw.c
 create mode 100644 lmr_lib/margin_hw.h
 create mode 100644 lmr_lib/margin_log.c
 create mode 100644 lmr_lib/margin_log.h
 create mode 100644 lmr_lib/margin_results.c
 create mode 100644 lmr_lib/margin_results.h
 create mode 100644 pcilmr.c
 create mode 100644 pcilmr.man

Comments

Martin Mareš Dec. 8, 2023, 5:30 p.m. UTC | #1

Hello!

> PCIe Gen 4 spec introduced new extended capability mandatory for all
> ports - Lane Margining at the Receiver. This new feature allows to get an
> approximation of the Link eye margin diagram by four points. This
> information shows how resistant the Link is to external influences and can
> be useful for link debugging and presets tuning.
> Previously, this information was only available using a hardware debugger.
> 
> Patch series consists of two parts:
> 
> * Patch for lspci to add Margining registers reading. There is not much
>   information available without issuing any margining commands, but this
>   info is useful anyway;
> * New pcilmr utility.
> 
> Margining capability assumes the exchange of commands with the device, so
> its support was implemented as a separate utility pcilmr.
> The pcilmr allows you to test Links and supports all the features provided
> by the Margining capability. The utility is written using a pcilib, it is
> divided into a library part and a main function with arguments parsing in
> the pciutils root dir.
> Man page is provided as well.
> 
> Utility compilation and man page preparation are integrated into the
> pciutils Makefile, so run make is enough to start testing the utility
> (Gen 4/5 device is required though).
> Utility was written with Linux in mind and was tested only on this OS.

Thanks for your contribution. The utility will need some cleanups,
but overall I will be glad to accept it.

				Have a nice fortnight