| Message ID | 20240108232145.2116455-3-Frank.Li@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | PCI: imx6: Clean up and add imx95 pci support | expand |
On Mon, Jan 08, 2024 at 06:21:31PM -0500, Frank Li wrote: > Add IMX6_PCIE_FLAG_HAS_PHYDRV bitmask define for drvdata::flags. Reduce > switch-case structure for handling phy. > "Since some i.MX platforms make use of the separate PHY driver, use IMX6_PCIE_FLAG_HAS_PHYDRV flag to identify them and get the reference to PHY from DT. This simplifies the code." > Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > > Notes: > Change from v7 to v8: > - renmae IMX6_PCIE_FLAG_HAS_PHY to IMX6_PCIE_FLAG_HAS_PHYDRV > Change from v6 to v7: > - none > Change from v4 to v5: > - none, Keep IMX6_PCIE_FLAG_HAS_PHY to indicate dts mismatch when platform > require phy suppport. > > Change from v1 to v3: > - none > > drivers/pci/controller/dwc/pci-imx6.c | 24 +++++++++++++++++------- > 1 file changed, 17 insertions(+), 7 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index 4912c6b08ecf8..adc90099ec7f8 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -60,6 +60,9 @@ enum imx6_pcie_variants { > #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) > #define IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE BIT(1) > #define IMX6_PCIE_FLAG_SUPPORTS_SUSPEND BIT(2) > +#define IMX6_PCIE_FLAG_HAS_PHYDRV BIT(3) > + > +#define imx6_check_flag(pci, val) (pci->drvdata->flags & val) > > #define IMX6_PCIE_MAX_CLKS 6 > > @@ -1277,6 +1280,13 @@ static int imx6_pcie_probe(struct platform_device *pdev) > if (ret) > return ret; > > + if (imx6_check_flag(imx6_pcie, IMX6_PCIE_FLAG_HAS_PHYDRV)) { > + imx6_pcie->phy = devm_phy_get(dev, "pcie-phy"); > + if (IS_ERR(imx6_pcie->phy)) > + return dev_err_probe(dev, PTR_ERR(imx6_pcie->phy), > + "failed to get pcie phy\n"); > + } > + > switch (imx6_pcie->drvdata->variant) { > case IMX7D: > if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) > @@ -1306,11 +1316,6 @@ static int imx6_pcie_probe(struct platform_device *pdev) > return dev_err_probe(dev, PTR_ERR(imx6_pcie->apps_reset), > "failed to get pcie apps reset control\n"); > > - imx6_pcie->phy = devm_phy_get(dev, "pcie-phy"); > - if (IS_ERR(imx6_pcie->phy)) > - return dev_err_probe(dev, PTR_ERR(imx6_pcie->phy), > - "failed to get pcie phy\n"); > - > break; > default: > break; > @@ -1458,14 +1463,17 @@ static const struct imx6_pcie_drvdata drvdata[] = { > }, > [IMX8MM] = { > .variant = IMX8MM, > - .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, > + .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND | > + IMX6_PCIE_FLAG_HAS_PHYDRV | > + IMX6_PCIE_FLAG_HAS_APP_RESET, > .gpr = "fsl,imx8mm-iomuxc-gpr", > .clk_names = imx6_3clks_bus_pcie_aux, > .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_aux), > }, > [IMX8MP] = { > .variant = IMX8MP, > - .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, > + .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND | > + IMX6_PCIE_FLAG_HAS_PHYDRV, > .gpr = "fsl,imx8mp-iomuxc-gpr", > .clk_names = imx6_3clks_bus_pcie_aux, > .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_aux), > @@ -1479,6 +1487,7 @@ static const struct imx6_pcie_drvdata drvdata[] = { > }, > [IMX8MM_EP] = { > .variant = IMX8MM_EP, > + .flags = IMX6_PCIE_FLAG_HAS_PHYDRV, > .mode = DW_PCIE_EP_TYPE, > .gpr = "fsl,imx8mm-iomuxc-gpr", > .clk_names = imx6_3clks_bus_pcie_aux, > @@ -1486,6 +1495,7 @@ static const struct imx6_pcie_drvdata drvdata[] = { > }, > [IMX8MP_EP] = { > .variant = IMX8MP_EP, > + .flags = IMX6_PCIE_FLAG_HAS_PHYDRV, > .mode = DW_PCIE_EP_TYPE, > .gpr = "fsl,imx8mp-iomuxc-gpr", > .clk_names = imx6_3clks_bus_pcie_aux, > -- > 2.34.1 >
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 4912c6b08ecf8..adc90099ec7f8 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -60,6 +60,9 @@ enum imx6_pcie_variants { #define IMX6_PCIE_FLAG_IMX6_PHY BIT(0) #define IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE BIT(1) #define IMX6_PCIE_FLAG_SUPPORTS_SUSPEND BIT(2) +#define IMX6_PCIE_FLAG_HAS_PHYDRV BIT(3) + +#define imx6_check_flag(pci, val) (pci->drvdata->flags & val) #define IMX6_PCIE_MAX_CLKS 6 @@ -1277,6 +1280,13 @@ static int imx6_pcie_probe(struct platform_device *pdev) if (ret) return ret; + if (imx6_check_flag(imx6_pcie, IMX6_PCIE_FLAG_HAS_PHYDRV)) { + imx6_pcie->phy = devm_phy_get(dev, "pcie-phy"); + if (IS_ERR(imx6_pcie->phy)) + return dev_err_probe(dev, PTR_ERR(imx6_pcie->phy), + "failed to get pcie phy\n"); + } + switch (imx6_pcie->drvdata->variant) { case IMX7D: if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR) @@ -1306,11 +1316,6 @@ static int imx6_pcie_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(imx6_pcie->apps_reset), "failed to get pcie apps reset control\n"); - imx6_pcie->phy = devm_phy_get(dev, "pcie-phy"); - if (IS_ERR(imx6_pcie->phy)) - return dev_err_probe(dev, PTR_ERR(imx6_pcie->phy), - "failed to get pcie phy\n"); - break; default: break; @@ -1458,14 +1463,17 @@ static const struct imx6_pcie_drvdata drvdata[] = { }, [IMX8MM] = { .variant = IMX8MM, - .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, + .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND | + IMX6_PCIE_FLAG_HAS_PHYDRV | + IMX6_PCIE_FLAG_HAS_APP_RESET, .gpr = "fsl,imx8mm-iomuxc-gpr", .clk_names = imx6_3clks_bus_pcie_aux, .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_aux), }, [IMX8MP] = { .variant = IMX8MP, - .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND, + .flags = IMX6_PCIE_FLAG_SUPPORTS_SUSPEND | + IMX6_PCIE_FLAG_HAS_PHYDRV, .gpr = "fsl,imx8mp-iomuxc-gpr", .clk_names = imx6_3clks_bus_pcie_aux, .clks_cnt = ARRAY_SIZE(imx6_3clks_bus_pcie_aux), @@ -1479,6 +1487,7 @@ static const struct imx6_pcie_drvdata drvdata[] = { }, [IMX8MM_EP] = { .variant = IMX8MM_EP, + .flags = IMX6_PCIE_FLAG_HAS_PHYDRV, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mm-iomuxc-gpr", .clk_names = imx6_3clks_bus_pcie_aux, @@ -1486,6 +1495,7 @@ static const struct imx6_pcie_drvdata drvdata[] = { }, [IMX8MP_EP] = { .variant = IMX8MP_EP, + .flags = IMX6_PCIE_FLAG_HAS_PHYDRV, .mode = DW_PCIE_EP_TYPE, .gpr = "fsl,imx8mp-iomuxc-gpr", .clk_names = imx6_3clks_bus_pcie_aux,
Add IMX6_PCIE_FLAG_HAS_PHYDRV bitmask define for drvdata::flags. Reduce switch-case structure for handling phy. Signed-off-by: Frank Li <Frank.Li@nxp.com> --- Notes: Change from v7 to v8: - renmae IMX6_PCIE_FLAG_HAS_PHY to IMX6_PCIE_FLAG_HAS_PHYDRV Change from v6 to v7: - none Change from v4 to v5: - none, Keep IMX6_PCIE_FLAG_HAS_PHY to indicate dts mismatch when platform require phy suppport. Change from v1 to v3: - none drivers/pci/controller/dwc/pci-imx6.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-)