| Message ID | 64ef42f0-5618-40fd-b715-0d412121045c@moroto.mountain (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | [v4,1/2] PCI: dwc: Fix a 64bit bug in dw_pcie_ep_raise_msix_irq() | expand |
On Wed, 24 Jan 2024, Dan Carpenter wrote: > I recently changed the alignment code in dw_pcie_ep_raise_msix_irq(). > The code in dw_pcie_ep_raise_msi_irq() is similar so update it to match > as well, just for consistency. (No effect on runtime, just a cleanup). > > Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> > --- > v4: style improvements > v3: use ALIGN_DOWN() > v2: new patch > > drivers/pci/controller/dwc/pcie-designware-ep.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > index 51679c6702cf..d2de41f02a77 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > @@ -482,9 +482,10 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, > reg = ep_func->msi_cap + PCI_MSI_DATA_32; > msg_data = dw_pcie_ep_readw_dbi(ep, func_no, reg); > } > - aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1); > - msg_addr = ((u64)msg_addr_upper) << 32 | > - (msg_addr_lower & ~aligned_offset); > + msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower; > + > + aligned_offset = msg_addr & (epc->mem->window.page_size - 1); > + msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size); After you've added the #include in 1/2, for both patches: Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
On Wed, Jan 24, 2024 at 06:03:51PM +0300, Dan Carpenter wrote: > I recently changed the alignment code in dw_pcie_ep_raise_msix_irq(). > The code in dw_pcie_ep_raise_msi_irq() is similar so update it to match > as well, just for consistency. (No effect on runtime, just a cleanup). > > Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> > --- > v4: style improvements > v3: use ALIGN_DOWN() > v2: new patch > > drivers/pci/controller/dwc/pcie-designware-ep.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > index 51679c6702cf..d2de41f02a77 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > @@ -482,9 +482,10 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, > reg = ep_func->msi_cap + PCI_MSI_DATA_32; > msg_data = dw_pcie_ep_readw_dbi(ep, func_no, reg); > } > - aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1); > - msg_addr = ((u64)msg_addr_upper) << 32 | > - (msg_addr_lower & ~aligned_offset); > + msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower; > + > + aligned_offset = msg_addr & (epc->mem->window.page_size - 1); > + msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size); > ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr, > epc->mem->window.page_size); > if (ret) > -- > 2.43.0 > Reviewed-by: Niklas Cassel <cassel@kernel.org> (Feel free to keep my R-b tags even if you send out a new version with the #include requested by Ilpo.)
On Wed, Jan 24, 2024 at 06:03:51PM +0300, Dan Carpenter wrote: > I recently changed the alignment code in dw_pcie_ep_raise_msix_irq(). > The code in dw_pcie_ep_raise_msi_irq() is similar so update it to match > as well, just for consistency. (No effect on runtime, just a cleanup). > > Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > v4: style improvements > v3: use ALIGN_DOWN() > v2: new patch > > drivers/pci/controller/dwc/pcie-designware-ep.c | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > index 51679c6702cf..d2de41f02a77 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > @@ -482,9 +482,10 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, > reg = ep_func->msi_cap + PCI_MSI_DATA_32; > msg_data = dw_pcie_ep_readw_dbi(ep, func_no, reg); > } > - aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1); > - msg_addr = ((u64)msg_addr_upper) << 32 | > - (msg_addr_lower & ~aligned_offset); > + msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower; > + > + aligned_offset = msg_addr & (epc->mem->window.page_size - 1); > + msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size); > ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr, > epc->mem->window.page_size); > if (ret) > -- > 2.43.0 >
diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 51679c6702cf..d2de41f02a77 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -482,9 +482,10 @@ int dw_pcie_ep_raise_msi_irq(struct dw_pcie_ep *ep, u8 func_no, reg = ep_func->msi_cap + PCI_MSI_DATA_32; msg_data = dw_pcie_ep_readw_dbi(ep, func_no, reg); } - aligned_offset = msg_addr_lower & (epc->mem->window.page_size - 1); - msg_addr = ((u64)msg_addr_upper) << 32 | - (msg_addr_lower & ~aligned_offset); + msg_addr = ((u64)msg_addr_upper) << 32 | msg_addr_lower; + + aligned_offset = msg_addr & (epc->mem->window.page_size - 1); + msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size); ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr, epc->mem->window.page_size); if (ret)
I recently changed the alignment code in dw_pcie_ep_raise_msix_irq(). The code in dw_pcie_ep_raise_msi_irq() is similar so update it to match as well, just for consistency. (No effect on runtime, just a cleanup). Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> --- v4: style improvements v3: use ALIGN_DOWN() v2: new patch drivers/pci/controller/dwc/pcie-designware-ep.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)