diff mbox series

[v15,5/9] drm/i915/dp: Add wrapper function to check AS SDP

Message ID 20240301084503.2971826-6-mitulkumar.ajitkumar.golani@intel.com (mailing list archive)
State New, archived
Headers show
Series Enable Adaptive Sync SDP Support for DP | expand

Commit Message

Golani, Mitulkumar Ajitkumar March 1, 2024, 8:44 a.m. UTC
Add a wrapper function to check if both the source and
sink support Adaptive Sync SDP.

--v1:
Just use drm/i915/dp in subject line.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++++++
 drivers/gpu/drm/i915/display/intel_dp.h | 1 +
 2 files changed, 9 insertions(+)

Comments

Ankit Nautiyal March 4, 2024, 10:09 a.m. UTC | #1
On 3/1/2024 2:14 PM, Mitul Golani wrote:
> Add a wrapper function to check if both the source and
> sink support Adaptive Sync SDP.
>
> --v1:
> Just use drm/i915/dp in subject line.
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> ---
>   drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++++++
>   drivers/gpu/drm/i915/display/intel_dp.h | 1 +
>   2 files changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 99732ac1475d..1b3e7ae3dd76 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -122,6 +122,14 @@ bool intel_dp_is_edp(struct intel_dp *intel_dp)
>   	return dig_port->base.type == INTEL_OUTPUT_EDP;
>   }
>   
> +bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp)
> +{
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +
> +	return HAS_AS_SDP(i915) &&
> +		drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd);
> +}
> +
>   static void intel_dp_unset_edid(struct intel_dp *intel_dp);
>   
>   /* Is link rate UHBR and thus 128b/132b? */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 564a587e2d01..0b15fd4750ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -86,6 +86,7 @@ void intel_dp_audio_compute_config(struct intel_encoder *encoder,
>   				   struct drm_connector_state *conn_state);
>   bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
>   bool intel_dp_is_edp(struct intel_dp *intel_dp);
> +bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp);
>   bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
>   int intel_dp_link_symbol_size(int rate);
>   int intel_dp_link_symbol_clock(int rate);
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 99732ac1475d..1b3e7ae3dd76 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -122,6 +122,14 @@  bool intel_dp_is_edp(struct intel_dp *intel_dp)
 	return dig_port->base.type == INTEL_OUTPUT_EDP;
 }
 
+bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+
+	return HAS_AS_SDP(i915) &&
+		drm_dp_as_sdp_supported(&intel_dp->aux, intel_dp->dpcd);
+}
+
 static void intel_dp_unset_edid(struct intel_dp *intel_dp);
 
 /* Is link rate UHBR and thus 128b/132b? */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 564a587e2d01..0b15fd4750ee 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -86,6 +86,7 @@  void intel_dp_audio_compute_config(struct intel_encoder *encoder,
 				   struct drm_connector_state *conn_state);
 bool intel_dp_has_hdmi_sink(struct intel_dp *intel_dp);
 bool intel_dp_is_edp(struct intel_dp *intel_dp);
+bool intel_dp_as_sdp_supported(struct intel_dp *intel_dp);
 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
 int intel_dp_link_symbol_size(int rate);
 int intel_dp_link_symbol_clock(int rate);