| Message ID | 20240306-waltz-facial-9e4e1b792053@spud (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | [GIT,PULL] RISC-V Devicetree fixes for v6.8-final | expand |
| Context | Check | Description |
|---|---|---|
| conchuod/vmtest-fixes-PR | fail | merge-conflict |
On Wed, Mar 6, 2024, at 19:08, Conor Dooley wrote: > Hey Arnd, > > I know it is pretty late in the day here for fixes, and I would've kept > the builtin dtb fix as v6.9 material, but Geert reported yesterday that > boot was broken on the jh7100 platforms due to a fix that I sent in my > last PR. Sorry I missed them last week. I added this to the soc/dt branch for 6.9 now. You might want to ask stable@vger.kernel.org for a backport after -rc1 is out if they don't automatically pick them up. Arnd
On Mon, Mar 11, 2024 at 09:12:08AM +0100, Arnd Bergmann wrote: > On Wed, Mar 6, 2024, at 19:08, Conor Dooley wrote: > > Hey Arnd, > > > > I know it is pretty late in the day here for fixes, and I would've kept > > the builtin dtb fix as v6.9 material, but Geert reported yesterday that > > boot was broken on the jh7100 platforms due to a fix that I sent in my > > last PR. > > Sorry I missed them last week. I added this to the soc/dt branch > for 6.9 now. You might want to ask stable@vger.kernel.org for a > backport after -rc1 is out if they don't automatically pick them > up. Right, it was an unexpected PR and late in the cycle. It's only the jh7100 patch that'd need a backport. I'll request a backport if one doesn't happen automagically, which it probably will, even though I didn't have a cc: stable on it.
Hey Arnd, I know it is pretty late in the day here for fixes, and I would've kept the builtin dtb fix as v6.9 material, but Geert reported yesterday that boot was broken on the jh7100 platforms due to a fix that I sent in my last PR. Thanks, Conor. The following changes since commit ce6b6d1513965f500a05f3facf223fa01fd74920: riscv: dts: sifive: add missing #interrupt-cells to pmic (2024-02-14 09:09:33 +0000) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/riscv-dt-fixes-for-v6.8-final for you to fetch changes up to 2672031b20f6681514bef14ddcfe8c62c2757d11: riscv: dts: Move BUILTIN_DTB_SOURCE to common Kconfig (2024-03-06 00:08:32 +0000) ---------------------------------------------------------------- RISC-V Devicetree fixes for v6.8-final Starfive: The previous cleanup broke boot on the jh7100 as the driver depended on the fallback clock name created based on the node-name when clock-output-names is not present. Add clock-output-names to restore working order. Generic: BUILTIN_DTB has been broken for ages on any platform other than the nommu Canaan k210 SoC as the first dtb built (in alphanumerical order), would get built into the image. This didn't get fixed for ages because nobody actually cared about running it other than the k210 enough to fix it. The folks doing Sophgo SG2042 development have come along and fixed it, as they want to use builtin dtbs. linux-boot on that platform reuses the dtb it was provided by OpenSBI when booting linux proper, which is unfortunately not possible to boot a mainline kernel with. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> ---------------------------------------------------------------- Krzysztof Kozlowski (1): riscv: dts: starfive: jh7100: fix root clock names Yangyu Chen (1): riscv: dts: Move BUILTIN_DTB_SOURCE to common Kconfig arch/riscv/Kconfig | 14 ++++++++++- arch/riscv/Kconfig.socs | 32 -------------------------- arch/riscv/boot/dts/Makefile | 2 +- arch/riscv/boot/dts/canaan/Makefile | 2 -- arch/riscv/boot/dts/microchip/Makefile | 1 - arch/riscv/boot/dts/sifive/Makefile | 1 - arch/riscv/boot/dts/starfive/jh7100.dtsi | 4 ++++ arch/riscv/configs/nommu_k210_defconfig | 2 ++ arch/riscv/configs/nommu_k210_sdcard_defconfig | 2 ++ 9 files changed, 22 insertions(+), 38 deletions(-)