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[v1] RISC-V: drop SOC_MICROCHIP_POLARFIRE for ARCH_MICROCHIP

Message ID 20240305-fled-undrilled-41dc0c46bb29@spud (mailing list archive)
State Accepted
Headers show
Series [v1] RISC-V: drop SOC_MICROCHIP_POLARFIRE for ARCH_MICROCHIP | expand

Checks

Context Check Description
conchuod/vmtest-for-next-PR success PR summary
conchuod/patch-1-test-1 success .github/scripts/patches/tests/build_rv32_defconfig.sh
conchuod/patch-1-test-2 success .github/scripts/patches/tests/build_rv64_clang_allmodconfig.sh
conchuod/patch-1-test-3 success .github/scripts/patches/tests/build_rv64_gcc_allmodconfig.sh
conchuod/patch-1-test-4 success .github/scripts/patches/tests/build_rv64_nommu_k210_defconfig.sh
conchuod/patch-1-test-5 success .github/scripts/patches/tests/build_rv64_nommu_virt_defconfig.sh
conchuod/patch-1-test-6 warning .github/scripts/patches/tests/checkpatch.sh
conchuod/patch-1-test-7 success .github/scripts/patches/tests/dtb_warn_rv64.sh
conchuod/patch-1-test-8 success .github/scripts/patches/tests/header_inline.sh
conchuod/patch-1-test-9 success .github/scripts/patches/tests/kdoc.sh
conchuod/patch-1-test-10 success .github/scripts/patches/tests/module_param.sh
conchuod/patch-1-test-11 success .github/scripts/patches/tests/verify_fixes.sh
conchuod/patch-1-test-12 success .github/scripts/patches/tests/verify_signedoff.sh

Commit Message

Conor Dooley March 5, 2024, 7:20 p.m. UTC
From: Conor Dooley <conor.dooley@microchip.com>

SOC_MICROCHIP_POLARFIRE doesn't have any remaining in-kernel users, so
time has come to remove it. Foolish auld me left the "POLARFIRE" in the
new, hidden, config option when I renamed it and changed all of the
users however. As HPSC has been announced, and is not a PolarFire,
drop mention of that specific FPGA family from the new user-visible
config option.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
CC: Paul Walmsley <paul.walmsley@sifive.com>
CC: Palmer Dabbelt <palmer@dabbelt.com>
CC: Conor Dooley <conor.dooley@microchip.com>
CC: linux-riscv@lists.infradead.org
---
 arch/riscv/Kconfig.socs      | 8 ++++----
 arch/riscv/configs/defconfig | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

Comments

Palmer Dabbelt April 3, 2024, 6:21 p.m. UTC | #1
On Tue, 05 Mar 2024 11:20:28 PST (-0800), Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> SOC_MICROCHIP_POLARFIRE doesn't have any remaining in-kernel users, so
> time has come to remove it. Foolish auld me left the "POLARFIRE" in the
> new, hidden, config option when I renamed it and changed all of the
> users however. As HPSC has been announced, and is not a PolarFire,
> drop mention of that specific FPGA family from the new user-visible
> config option.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> CC: Paul Walmsley <paul.walmsley@sifive.com>
> CC: Palmer Dabbelt <palmer@dabbelt.com>
> CC: Conor Dooley <conor.dooley@microchip.com>
> CC: linux-riscv@lists.infradead.org
> ---
>  arch/riscv/Kconfig.socs      | 8 ++++----
>  arch/riscv/configs/defconfig | 2 +-
>  2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index e08e91c49abe..5fd2e9f425d1 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -1,12 +1,12 @@
>  menu "SoC selection"
>
>  config ARCH_MICROCHIP_POLARFIRE
> -	def_bool SOC_MICROCHIP_POLARFIRE
> +	def_bool ARCH_MICROCHIP
>
> -config SOC_MICROCHIP_POLARFIRE
> -	bool "Microchip PolarFire SoCs"
> +config ARCH_MICROCHIP
> +	bool "Microchip SoCs"
>  	help
> -	  This enables support for Microchip PolarFire SoC platforms.
> +	  This enables support for Microchip SoC platforms.
>
>  config ARCH_RENESAS
>  	bool "Renesas RISC-V SoCs"
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 89a009a580fe..5cfc0338ad5c 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -25,7 +25,7 @@ CONFIG_BLK_DEV_INITRD=y
>  CONFIG_EXPERT=y
>  # CONFIG_SYSFS_SYSCALL is not set
>  CONFIG_PROFILING=y
> -CONFIG_SOC_MICROCHIP_POLARFIRE=y
> +CONFIG_ARCH_MICROCHIP=y
>  CONFIG_ARCH_RENESAS=y
>  CONFIG_SOC_SIFIVE=y
>  CONFIG_ARCH_SOPHGO=y

Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Conor Dooley April 10, 2024, 10:44 a.m. UTC | #2
From: Conor Dooley <conor.dooley@microchip.com>

On Tue, 05 Mar 2024 19:20:28 +0000, Conor Dooley wrote:
> SOC_MICROCHIP_POLARFIRE doesn't have any remaining in-kernel users, so
> time has come to remove it. Foolish auld me left the "POLARFIRE" in the
> new, hidden, config option when I renamed it and changed all of the
> users however. As HPSC has been announced, and is not a PolarFire,
> drop mention of that specific FPGA family from the new user-visible
> config option.
> 
> [...]

Applied to riscv-soc-for-next, thanks!

[1/1] RISC-V: drop SOC_MICROCHIP_POLARFIRE for ARCH_MICROCHIP
      https://git.kernel.org/conor/c/37c09ed41925

Thanks,
Conor.
diff mbox series

Patch

diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
index e08e91c49abe..5fd2e9f425d1 100644
--- a/arch/riscv/Kconfig.socs
+++ b/arch/riscv/Kconfig.socs
@@ -1,12 +1,12 @@ 
 menu "SoC selection"
 
 config ARCH_MICROCHIP_POLARFIRE
-	def_bool SOC_MICROCHIP_POLARFIRE
+	def_bool ARCH_MICROCHIP
 
-config SOC_MICROCHIP_POLARFIRE
-	bool "Microchip PolarFire SoCs"
+config ARCH_MICROCHIP
+	bool "Microchip SoCs"
 	help
-	  This enables support for Microchip PolarFire SoC platforms.
+	  This enables support for Microchip SoC platforms.
 
 config ARCH_RENESAS
 	bool "Renesas RISC-V SoCs"
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 89a009a580fe..5cfc0338ad5c 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -25,7 +25,7 @@  CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
 # CONFIG_SYSFS_SYSCALL is not set
 CONFIG_PROFILING=y
-CONFIG_SOC_MICROCHIP_POLARFIRE=y
+CONFIG_ARCH_MICROCHIP=y
 CONFIG_ARCH_RENESAS=y
 CONFIG_SOC_SIFIVE=y
 CONFIG_ARCH_SOPHGO=y