diff mbox series

[v4,2/4] drm/i915/display: don't allow DMC wakelock on older hardware

Message ID 20240404114147.236316-3-luciano.coelho@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/display: DMC wakelock implementation | expand

Commit Message

Luca Coelho April 4, 2024, 11:41 a.m. UTC
Only allow running DMC wakelock code if the display version is 20 or
greater.  Also check if DMC is loaded before enabling.

Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 .../drm/i915/display/intel_display_driver.c   |  1 +
 drivers/gpu/drm/i915/display/intel_dmc_wl.c   | 26 +++++++++++++++++++
 2 files changed, 27 insertions(+)

Comments

Shankar, Uma April 11, 2024, 9:44 a.m. UTC | #1
> -----Original Message-----
> From: Coelho, Luciano <luciano.coelho@intel.com>
> Sent: Thursday, April 4, 2024 5:12 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org; Shankar, Uma <uma.shankar@intel.com>;
> ville.syrjala@linux.intel.com; Nikula, Jani <jani.nikula@intel.com>
> Subject: [PATCH v4 2/4] drm/i915/display: don't allow DMC wakelock on older
> hardware
> 
> Only allow running DMC wakelock code if the display version is 20 or greater.  Also
> check if DMC is loaded before enabling.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> ---
>  .../drm/i915/display/intel_display_driver.c   |  1 +
>  drivers/gpu/drm/i915/display/intel_dmc_wl.c   | 26 +++++++++++++++++++
>  2 files changed, 27 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
> b/drivers/gpu/drm/i915/display/intel_display_driver.c
> index 87dd07e0d138..e4015557af6a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_driver.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
> @@ -198,6 +198,7 @@ void intel_display_driver_early_probe(struct
> drm_i915_private *i915)
>  	intel_dpll_init_clock_hook(i915);
>  	intel_init_display_hooks(i915);
>  	intel_fdi_init_hook(i915);
> +	intel_dmc_wl_init(i915);
>  }
> 
>  /* part #1: call before irq install */
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> index 3d7cf47321c2..065652fc475c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> @@ -6,6 +6,7 @@
>  #include <linux/kernel.h>
> 
>  #include "intel_de.h"
> +#include "intel_dmc.h"
>  #include "intel_dmc_regs.h"
>  #include "intel_dmc_wl.h"
> 
> @@ -110,10 +111,23 @@ static bool intel_dmc_wl_check_range(u32 address)
>  	return wl_needed;
>  }
> 
> +static bool __intel_dmc_wl_supported(struct drm_i915_private *i915) {
> +	if (DISPLAY_VER(i915) < 20 ||
> +	    !intel_dmc_has_payload(i915))
> +		return false;
> +
> +	return true;
> +}
> +
>  void intel_dmc_wl_init(struct drm_i915_private *i915)  {
>  	struct intel_dmc_wl *wl = &i915->display.wl;
> 
> +	/* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */
> +	if (DISPLAY_VER(i915) < 20)
> +		return;
> +
>  	INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work);
>  	spin_lock_init(&wl->lock);
>  	refcount_set(&wl->refcount, 0);
> @@ -124,6 +138,9 @@ void intel_dmc_wl_enable(struct drm_i915_private
> *i915)
>  	struct intel_dmc_wl *wl = &i915->display.wl;
>  	unsigned long flags;
> 
> +	if (!__intel_dmc_wl_supported(i915))
> +		return;
> +
>  	spin_lock_irqsave(&wl->lock, flags);
> 
>  	if (wl->enabled)
> @@ -148,6 +165,9 @@ void intel_dmc_wl_disable(struct drm_i915_private
> *i915)
>  	struct intel_dmc_wl *wl = &i915->display.wl;
>  	unsigned long flags;
> 
> +	if (!__intel_dmc_wl_supported(i915))
> +		return;
> +
>  	flush_delayed_work(&wl->work);
> 
>  	spin_lock_irqsave(&wl->lock, flags);
> @@ -171,6 +191,9 @@ void intel_dmc_wl_get(struct drm_i915_private *i915,
> i915_reg_t reg)
>  	struct intel_dmc_wl *wl = &i915->display.wl;
>  	unsigned long flags;
> 
> +	if (!__intel_dmc_wl_supported(i915))
> +		return;
> +
>  	if (!intel_dmc_wl_check_range(reg.reg))
>  		return;
> 
> @@ -215,6 +238,9 @@ void intel_dmc_wl_put(struct drm_i915_private *i915,
> i915_reg_t reg)
>  	struct intel_dmc_wl *wl = &i915->display.wl;
>  	unsigned long flags;
> 
> +	if (!__intel_dmc_wl_supported(i915))
> +		return;
> +
>  	if (!intel_dmc_wl_check_range(reg.reg))
>  		return;
> 
> --
> 2.39.2
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 87dd07e0d138..e4015557af6a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -198,6 +198,7 @@  void intel_display_driver_early_probe(struct drm_i915_private *i915)
 	intel_dpll_init_clock_hook(i915);
 	intel_init_display_hooks(i915);
 	intel_fdi_init_hook(i915);
+	intel_dmc_wl_init(i915);
 }
 
 /* part #1: call before irq install */
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
index 3d7cf47321c2..065652fc475c 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -6,6 +6,7 @@ 
 #include <linux/kernel.h>
 
 #include "intel_de.h"
+#include "intel_dmc.h"
 #include "intel_dmc_regs.h"
 #include "intel_dmc_wl.h"
 
@@ -110,10 +111,23 @@  static bool intel_dmc_wl_check_range(u32 address)
 	return wl_needed;
 }
 
+static bool __intel_dmc_wl_supported(struct drm_i915_private *i915)
+{
+	if (DISPLAY_VER(i915) < 20 ||
+	    !intel_dmc_has_payload(i915))
+		return false;
+
+	return true;
+}
+
 void intel_dmc_wl_init(struct drm_i915_private *i915)
 {
 	struct intel_dmc_wl *wl = &i915->display.wl;
 
+	/* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */
+	if (DISPLAY_VER(i915) < 20)
+		return;
+
 	INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work);
 	spin_lock_init(&wl->lock);
 	refcount_set(&wl->refcount, 0);
@@ -124,6 +138,9 @@  void intel_dmc_wl_enable(struct drm_i915_private *i915)
 	struct intel_dmc_wl *wl = &i915->display.wl;
 	unsigned long flags;
 
+	if (!__intel_dmc_wl_supported(i915))
+		return;
+
 	spin_lock_irqsave(&wl->lock, flags);
 
 	if (wl->enabled)
@@ -148,6 +165,9 @@  void intel_dmc_wl_disable(struct drm_i915_private *i915)
 	struct intel_dmc_wl *wl = &i915->display.wl;
 	unsigned long flags;
 
+	if (!__intel_dmc_wl_supported(i915))
+		return;
+
 	flush_delayed_work(&wl->work);
 
 	spin_lock_irqsave(&wl->lock, flags);
@@ -171,6 +191,9 @@  void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg)
 	struct intel_dmc_wl *wl = &i915->display.wl;
 	unsigned long flags;
 
+	if (!__intel_dmc_wl_supported(i915))
+		return;
+
 	if (!intel_dmc_wl_check_range(reg.reg))
 		return;
 
@@ -215,6 +238,9 @@  void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg)
 	struct intel_dmc_wl *wl = &i915->display.wl;
 	unsigned long flags;
 
+	if (!__intel_dmc_wl_supported(i915))
+		return;
+
 	if (!intel_dmc_wl_check_range(reg.reg))
 		return;