diff mbox series

MAINTAINERS: Update my email address

Message ID 20240412123729.1340062-1-bmeng.cn@gmail.com (mailing list archive)
State New, archived
Headers show
Series MAINTAINERS: Update my email address | expand

Commit Message

Bin Meng April 12, 2024, 12:37 p.m. UTC 
The Wind River email address might change in the future. Use my
personal email address instead.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

 MAINTAINERS | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Philippe Mathieu-Daudé April 12, 2024, 5:33 p.m. UTC | #1 
Hi Bin,

On 12/4/24 14:37, Bin Meng wrote:
> The Wind River email address might change in the future. Use my
> personal email address instead.
> 
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> 
> ---
> 
>   MAINTAINERS | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f1f6922025..50729a0985 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -332,7 +332,7 @@ F: tests/tcg/ppc*/*
>   RISC-V TCG CPUs
>   M: Palmer Dabbelt <palmer@dabbelt.com>
>   M: Alistair Francis <alistair.francis@wdc.com>
> -M: Bin Meng <bin.meng@windriver.com>
> +M: Bin Meng <bmeng.cn@gmail.com>

Do you mind confirming that from your windriver.com
email while you still have it?

Thanks,

Phil.
diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index f1f6922025..50729a0985 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -332,7 +332,7 @@  F: tests/tcg/ppc*/*
 RISC-V TCG CPUs
 M: Palmer Dabbelt <palmer@dabbelt.com>
 M: Alistair Francis <alistair.francis@wdc.com>
-M: Bin Meng <bin.meng@windriver.com>
+M: Bin Meng <bmeng.cn@gmail.com>
 R: Weiwei Li <liwei1518@gmail.com>
 R: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
 R: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
@@ -1614,7 +1614,7 @@  F: include/hw/riscv/opentitan.h
 F: include/hw/*/ibex_*.h
 
 Microchip PolarFire SoC Icicle Kit
-M: Bin Meng <bin.meng@windriver.com>
+M: Bin Meng <bmeng.cn@gmail.com>
 L: qemu-riscv@nongnu.org
 S: Supported
 F: docs/system/riscv/microchip-icicle-kit.rst
@@ -1641,7 +1641,7 @@  F: include/hw/char/shakti_uart.h
 
 SiFive Machines
 M: Alistair Francis <Alistair.Francis@wdc.com>
-M: Bin Meng <bin.meng@windriver.com>
+M: Bin Meng <bmeng.cn@gmail.com>
 M: Palmer Dabbelt <palmer@dabbelt.com>
 L: qemu-riscv@nongnu.org
 S: Supported
@@ -2137,7 +2137,7 @@  F: hw/ssi/xilinx_*
 
 SD (Secure Card)
 M: Philippe Mathieu-Daudé <philmd@linaro.org>
-M: Bin Meng <bin.meng@windriver.com>
+M: Bin Meng <bmeng.cn@gmail.com>
 L: qemu-block@nongnu.org
 S: Odd Fixes
 F: include/hw/sd/sd*