Message ID | IA1PR20MB495355A4186420B78BD78F49BB1B2@IA1PR20MB4953.namprd20.prod.outlook.com |
---|---|
State | Superseded |
Headers | show |
Series | riscv: sophgo: add USB phy support for CV18XX series | expand |
On Mon, Apr 29, 2024 at 08:31:11AM +0800, Inochi Amaoto wrote: > The USB phy of Sophgo CV18XX series SoC needs to sense a pin called > "VBUS_DET" to get the right operation mode. If this pin is not > connected, it only supports setting the mode manually. > > Add USB phy bindings for Sophgo CV18XX/SG200X series SoC. > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com> > --- > .../bindings/phy/sophgo,cv1800-usb-phy.yaml | 68 +++++++++++++++++++ > 1 file changed, 68 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > new file mode 100644 > index 000000000000..7e3382c18d44 > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > @@ -0,0 +1,68 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/sophgo,cv1800-usb-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Sophgo CV18XX/SG200X USB 2.0 PHY > + > +maintainers: > + - Inochi Amaoto <inochiama@outlook.com> > + > +properties: > + compatible: > + const: sophgo,cv1800-usb-phy > + > + reg: > + maxItems: 1 > + > + "#phy-cells": > + const: 0 > + > + clocks: > + items: > + - description: PHY clock > + - description: PHY app clock > + - description: PHY stb clock > + - description: PHY lpm clock > + > + clock-names: > + items: > + - const: phy > + - const: app > + - const: stb > + - const: lpm > + > + vbus_det-gpios: "vbus_det-gpios" isn't a common property AFAICT, why does it not get a vendor prefix when the other gpios property does? > + description: GPIO to the USB OTG VBUS detect pin. This should not be > + defined if vbus_det pin and switch pin are connected, which may > + break the VBUS detection. > + maxItems: 1 > + > + sophgo,switch-gpios: > + description: GPIO array for the phy to control connected switch. For > + host mode, the driver will set these GPIOs to low one by one. For > + device mode, the driver will set these GPIOs to high in reverse > + order. > + maxItems: 2 You're still missing the itemised description of what each of the gpios here are - how would I know which order to put the GPIOs in? Cheers, Conor. > + > +required: > + - compatible > + - "#phy-cells" > + - clocks > + - clock-names > + > +additionalProperties: false > + > +examples: > + - | > + phy@48 { > + compatible = "sophgo,cv1800-usb-phy"; > + reg = <0x48 0x4>; > + #phy-cells = <0>; > + clocks = <&clk 92>, <&clk 93>, > + <&clk 94>, <&clk 95>; > + clock-names = "phy", "app", "stb", "lpm"; > + }; > + > +... > -- > 2.44.0 >
On Tue, Apr 30, 2024 at 06:09:20PM GMT, Conor Dooley wrote: > On Mon, Apr 29, 2024 at 08:31:11AM +0800, Inochi Amaoto wrote: > > The USB phy of Sophgo CV18XX series SoC needs to sense a pin called > > "VBUS_DET" to get the right operation mode. If this pin is not > > connected, it only supports setting the mode manually. > > > > Add USB phy bindings for Sophgo CV18XX/SG200X series SoC. > > > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com> > > --- > > .../bindings/phy/sophgo,cv1800-usb-phy.yaml | 68 +++++++++++++++++++ > > 1 file changed, 68 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > > > diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > new file mode 100644 > > index 000000000000..7e3382c18d44 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > @@ -0,0 +1,68 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/phy/sophgo,cv1800-usb-phy.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Sophgo CV18XX/SG200X USB 2.0 PHY > > + > > +maintainers: > > + - Inochi Amaoto <inochiama@outlook.com> > > + > > +properties: > > + compatible: > > + const: sophgo,cv1800-usb-phy > > + > > + reg: > > + maxItems: 1 > > + > > + "#phy-cells": > > + const: 0 > > + > > + clocks: > > + items: > > + - description: PHY clock > > + - description: PHY app clock > > + - description: PHY stb clock > > + - description: PHY lpm clock > > + > > + clock-names: > > + items: > > + - const: phy > > + - const: app > > + - const: stb > > + - const: lpm > > + > > + vbus_det-gpios: > > "vbus_det-gpios" isn't a common property AFAICT, why does it not get a > vendor prefix when the other gpios property does? > I have seen other binding (such as sunxi phy) uses this property without vendor prefix. So I think it is a common property and don't add perfix for it. But it is OK for me add the vendor prefix, thanks. > > + description: GPIO to the USB OTG VBUS detect pin. This should not be > > + defined if vbus_det pin and switch pin are connected, which may > > + break the VBUS detection. > > + maxItems: 1 > > + > > + sophgo,switch-gpios: > > + description: GPIO array for the phy to control connected switch. For > > + host mode, the driver will set these GPIOs to low one by one. For > > + device mode, the driver will set these GPIOs to high in reverse > > + order. > > + maxItems: 2 > > You're still missing the itemised description of what each of the gpios > here are - how would I know which order to put the GPIOs in? > > Cheers, > Conor. In most case, the order depends on hardware design. But following the guide sophgo provides, it does have an common order. Is it good to add this description as a reference guide? If so, I will add it. Regards, Inochi > > > + > > +required: > > + - compatible > > + - "#phy-cells" > > + - clocks > > + - clock-names > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + phy@48 { > > + compatible = "sophgo,cv1800-usb-phy"; > > + reg = <0x48 0x4>; > > + #phy-cells = <0>; > > + clocks = <&clk 92>, <&clk 93>, > > + <&clk 94>, <&clk 95>; > > + clock-names = "phy", "app", "stb", "lpm"; > > + }; > > + > > +... > > -- > > 2.44.0 > >
On Wed, May 01, 2024 at 08:28:47AM +0800, Inochi Amaoto wrote: > On Tue, Apr 30, 2024 at 06:09:20PM GMT, Conor Dooley wrote: > > On Mon, Apr 29, 2024 at 08:31:11AM +0800, Inochi Amaoto wrote: > > > The USB phy of Sophgo CV18XX series SoC needs to sense a pin called > > > "VBUS_DET" to get the right operation mode. If this pin is not > > > connected, it only supports setting the mode manually. > > > > > > Add USB phy bindings for Sophgo CV18XX/SG200X series SoC. > > > > > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com> > > > --- > > > .../bindings/phy/sophgo,cv1800-usb-phy.yaml | 68 +++++++++++++++++++ > > > 1 file changed, 68 insertions(+) > > > create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > > > > > diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > > new file mode 100644 > > > index 000000000000..7e3382c18d44 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > > @@ -0,0 +1,68 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > +%YAML 1.2 > > > +--- > > > +$id: http://devicetree.org/schemas/phy/sophgo,cv1800-usb-phy.yaml# > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > + > > > +title: Sophgo CV18XX/SG200X USB 2.0 PHY > > > + > > > +maintainers: > > > + - Inochi Amaoto <inochiama@outlook.com> > > > + > > > +properties: > > > + compatible: > > > + const: sophgo,cv1800-usb-phy > > > + > > > + reg: > > > + maxItems: 1 > > > + > > > + "#phy-cells": > > > + const: 0 > > > + > > > + clocks: > > > + items: > > > + - description: PHY clock > > > + - description: PHY app clock > > > + - description: PHY stb clock > > > + - description: PHY lpm clock > > > + > > > + clock-names: > > > + items: > > > + - const: phy > > > + - const: app > > > + - const: stb > > > + - const: lpm > > > + > > > + vbus_det-gpios: > > > > "vbus_det-gpios" isn't a common property AFAICT, why does it not get a > > vendor prefix when the other gpios property does? > > > > I have seen other binding (such as sunxi phy) uses this property without > vendor prefix. So I think it is a common property and don't add perfix > for it. But it is OK for me add the vendor prefix, thanks. I asked yesterday and Krzysztof said: "gpios just like supplies - no prefixes, I think." The other phy used a different property (they're not identical), I did check that yesterday. > > > > + description: GPIO to the USB OTG VBUS detect pin. This should not be > > > + defined if vbus_det pin and switch pin are connected, which may > > > + break the VBUS detection. > > > + maxItems: 1 > > > + > > > + sophgo,switch-gpios: > > > + description: GPIO array for the phy to control connected switch. For > > > + host mode, the driver will set these GPIOs to low one by one. For > > > + device mode, the driver will set these GPIOs to high in reverse > > > + order. > > > + maxItems: 2 > > > > You're still missing the itemised description of what each of the gpios > > here are - how would I know which order to put the GPIOs in? > > > > Cheers, > > Conor. > > In most case, the order depends on hardware design. But following the > guide sophgo provides, it does have an common order. Is it good to add > this description as a reference guide? If so, I will add it. If we can say "gpio 1 connects to xyz on the switch" & "gpio 2 connects to tuv" then it'll be easier to understand how to write the node. > > Regards, > Inochi > > > > > > + > > > +required: > > > + - compatible > > > + - "#phy-cells" > > > + - clocks > > > + - clock-names > > > + > > > +additionalProperties: false > > > + > > > +examples: > > > + - | > > > + phy@48 { > > > + compatible = "sophgo,cv1800-usb-phy"; > > > + reg = <0x48 0x4>; > > > + #phy-cells = <0>; > > > + clocks = <&clk 92>, <&clk 93>, > > > + <&clk 94>, <&clk 95>; > > > + clock-names = "phy", "app", "stb", "lpm"; > > > + }; > > > + > > > +... > > > -- > > > 2.44.0 > > > > >
On Wed, May 01, 2024 at 06:05:28PM GMT, Conor Dooley wrote: > On Wed, May 01, 2024 at 08:28:47AM +0800, Inochi Amaoto wrote: > > On Tue, Apr 30, 2024 at 06:09:20PM GMT, Conor Dooley wrote: > > > On Mon, Apr 29, 2024 at 08:31:11AM +0800, Inochi Amaoto wrote: > > > > The USB phy of Sophgo CV18XX series SoC needs to sense a pin called > > > > "VBUS_DET" to get the right operation mode. If this pin is not > > > > connected, it only supports setting the mode manually. > > > > > > > > Add USB phy bindings for Sophgo CV18XX/SG200X series SoC. > > > > > > > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com> > > > > --- > > > > .../bindings/phy/sophgo,cv1800-usb-phy.yaml | 68 +++++++++++++++++++ > > > > 1 file changed, 68 insertions(+) > > > > create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > > > > > > > diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > > > new file mode 100644 > > > > index 000000000000..7e3382c18d44 > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml > > > > @@ -0,0 +1,68 @@ > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > > > +%YAML 1.2 > > > > +--- > > > > +$id: http://devicetree.org/schemas/phy/sophgo,cv1800-usb-phy.yaml# > > > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > > > + > > > > +title: Sophgo CV18XX/SG200X USB 2.0 PHY > > > > + > > > > +maintainers: > > > > + - Inochi Amaoto <inochiama@outlook.com> > > > > + > > > > +properties: > > > > + compatible: > > > > + const: sophgo,cv1800-usb-phy > > > > + > > > > + reg: > > > > + maxItems: 1 > > > > + > > > > + "#phy-cells": > > > > + const: 0 > > > > + > > > > + clocks: > > > > + items: > > > > + - description: PHY clock > > > > + - description: PHY app clock > > > > + - description: PHY stb clock > > > > + - description: PHY lpm clock > > > > + > > > > + clock-names: > > > > + items: > > > > + - const: phy > > > > + - const: app > > > > + - const: stb > > > > + - const: lpm > > > > + > > > > + vbus_det-gpios: > > > > > > "vbus_det-gpios" isn't a common property AFAICT, why does it not get a > > > vendor prefix when the other gpios property does? > > > > > > > I have seen other binding (such as sunxi phy) uses this property without > > vendor prefix. So I think it is a common property and don't add perfix > > for it. But it is OK for me add the vendor prefix, thanks. > > I asked yesterday and Krzysztof said: > "gpios just like supplies - no prefixes, I think." Thanks for your explanation. If I do not understand wrong, you mean it does not need to add vender prefix? > The other phy used a different property (they're not identical), I did > check that yesterday. > Yes, it is not total identical. But they do look similar. > > > > > > + description: GPIO to the USB OTG VBUS detect pin. This should not be > > > > + defined if vbus_det pin and switch pin are connected, which may > > > > + break the VBUS detection. > > > > + maxItems: 1 > > > > + > > > > + sophgo,switch-gpios: > > > > + description: GPIO array for the phy to control connected switch. For > > > > + host mode, the driver will set these GPIOs to low one by one. For > > > > + device mode, the driver will set these GPIOs to high in reverse > > > > + order. > > > > + maxItems: 2 > > > > > > You're still missing the itemised description of what each of the gpios > > > here are - how would I know which order to put the GPIOs in? > > > > > > Cheers, > > > Conor. > > > > In most case, the order depends on hardware design. But following the > > guide sophgo provides, it does have an common order. Is it good to add > > this description as a reference guide? If so, I will add it. > > If we can say "gpio 1 connects to xyz on the switch" & "gpio 2 connects > to tuv" then it'll be easier to understand how to write the node. > Good, I will add description of reference design for these gpios. > > > > Regards, > > Inochi > > > > > > > > > + > > > > +required: > > > > + - compatible > > > > + - "#phy-cells" > > > > + - clocks > > > > + - clock-names > > > > + > > > > +additionalProperties: false > > > > + > > > > +examples: > > > > + - | > > > > + phy@48 { > > > > + compatible = "sophgo,cv1800-usb-phy"; > > > > + reg = <0x48 0x4>; > > > > + #phy-cells = <0>; > > > > + clocks = <&clk 92>, <&clk 93>, > > > > + <&clk 94>, <&clk 95>; > > > > + clock-names = "phy", "app", "stb", "lpm"; > > > > + }; > > > > + > > > > +... > > > > -- > > > > 2.44.0 > > > > > > > >
On Fri, May 03, 2024 at 08:36:47AM +0800, Inochi Amaoto wrote: > On Wed, May 01, 2024 at 06:05:28PM GMT, Conor Dooley wrote: > > On Wed, May 01, 2024 at 08:28:47AM +0800, Inochi Amaoto wrote: > > > On Tue, Apr 30, 2024 at 06:09:20PM GMT, Conor Dooley wrote: > > > > On Mon, Apr 29, 2024 at 08:31:11AM +0800, Inochi Amaoto wrote: > > > > > + vbus_det-gpios: > > > > > > > > "vbus_det-gpios" isn't a common property AFAICT, why does it not get a > > > > vendor prefix when the other gpios property does? > > > > > > > > > > I have seen other binding (such as sunxi phy) uses this property without > > > vendor prefix. So I think it is a common property and don't add perfix > > > for it. But it is OK for me add the vendor prefix, thanks. > > > > I asked yesterday and Krzysztof said: > > "gpios just like supplies - no prefixes, I think." > > Thanks for your explanation. If I do not understand wrong, you mean > it does not need to add vender prefix? Yeah, I think you're okay.
diff --git a/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml new file mode 100644 index 000000000000..7e3382c18d44 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/sophgo,cv1800-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV18XX/SG200X USB 2.0 PHY + +maintainers: + - Inochi Amaoto <inochiama@outlook.com> + +properties: + compatible: + const: sophgo,cv1800-usb-phy + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + items: + - description: PHY clock + - description: PHY app clock + - description: PHY stb clock + - description: PHY lpm clock + + clock-names: + items: + - const: phy + - const: app + - const: stb + - const: lpm + + vbus_det-gpios: + description: GPIO to the USB OTG VBUS detect pin. This should not be + defined if vbus_det pin and switch pin are connected, which may + break the VBUS detection. + maxItems: 1 + + sophgo,switch-gpios: + description: GPIO array for the phy to control connected switch. For + host mode, the driver will set these GPIOs to low one by one. For + device mode, the driver will set these GPIOs to high in reverse + order. + maxItems: 2 + +required: + - compatible + - "#phy-cells" + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + phy@48 { + compatible = "sophgo,cv1800-usb-phy"; + reg = <0x48 0x4>; + #phy-cells = <0>; + clocks = <&clk 92>, <&clk 93>, + <&clk 94>, <&clk 95>; + clock-names = "phy", "app", "stb", "lpm"; + }; + +...
The USB phy of Sophgo CV18XX series SoC needs to sense a pin called "VBUS_DET" to get the right operation mode. If this pin is not connected, it only supports setting the mode manually. Add USB phy bindings for Sophgo CV18XX/SG200X series SoC. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> --- .../bindings/phy/sophgo,cv1800-usb-phy.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/sophgo,cv1800-usb-phy.yaml -- 2.44.0