| Message ID | 20240507-pci2_upstream-v4-10-e8c80d874057@nxp.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Krzysztof Wilczyński |
| Headers | show |
| Series | PCI: imx6: Fix\rename\clean up and add lut information for imx95 | expand |
On Tue, May 07, 2024 at 02:45:48PM -0400, Frank Li wrote: > From: Richard Zhu <hongxing.zhu@nxp.com> > > Add i.MX8Q PCIe "fsl,imx8q-pcie" compatible strings. clock-names align dwc > common naming convension. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Cheers, Conor.
On Tue, 07 May 2024 14:45:48 -0400, Frank Li wrote: > From: Richard Zhu <hongxing.zhu@nxp.com> > > Add i.MX8Q PCIe "fsl,imx8q-pcie" compatible strings. clock-names align dwc > common naming convension. > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > Signed-off-by: Frank Li <Frank.Li@nxp.com> > --- > .../devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 8b8d77b1154b5..1e05c560d7975 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -30,6 +30,7 @@ properties: - fsl,imx8mm-pcie - fsl,imx8mp-pcie - fsl,imx95-pcie + - fsl,imx8q-pcie clocks: minItems: 3 @@ -184,6 +185,21 @@ allOf: - const: pcie_bus - const: pcie_aux + - if: + properties: + compatible: + enum: + - fsl,imx8q-pcie + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: dbi + - const: mstr + - const: slv + unevaluatedProperties: false examples: