Message ID | IA1PR20MB4953FF3C0CA0B51962DBE892BB972@IA1PR20MB4953.namprd20.prod.outlook.com (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Conor Dooley |
Headers | show |
Series | riscv: defconfig: Enable pinctrl support for CV18XX Series SoC | expand |
On Fri, Aug 30, 2024 at 04:57:38PM +0800, Inochi Amaoto wrote: > Enable pinctrl driver for the whole CV18XX series. > > Signed-off-by: Inochi Amaoto <inochiama@outlook.com> I've applied this one, I'll send it out to Arnd once it's been in linux-next. Cheers, Conor.
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 0d678325444f..cd7980df4759 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -167,6 +167,10 @@ CONFIG_SPI_RSPI=m CONFIG_SPI_SIFIVE=y CONFIG_SPI_SUN6I=y # CONFIG_PTP_1588_CLOCK is not set +CONFIG_PINCTRL_SOPHGO_CV1800B=y +CONFIG_PINCTRL_SOPHGO_CV1812H=y +CONFIG_PINCTRL_SOPHGO_SG2000=y +CONFIG_PINCTRL_SOPHGO_SG2002=y CONFIG_GPIO_SIFIVE=y CONFIG_POWER_RESET_GPIO_RESTART=y CONFIG_SENSORS_SFCTEMP=m
Enable pinctrl driver for the whole CV18XX series. Signed-off-by: Inochi Amaoto <inochiama@outlook.com> --- arch/riscv/configs/defconfig | 4 ++++ 1 file changed, 4 insertions(+)