| Message ID | 20240910151845.17308-2-svarbanov@suse.de (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add PCIe support for bcm2712 | expand |
On Tue, Sep 10, 2024 at 06:18:35PM +0300, Stanimir Varbanov wrote: > Adds DT bindings for bcm2712 MSI-X interrupt peripheral controller. > > Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> > --- > .../brcm,bcm2712-msix.yaml | 69 +++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml > new file mode 100644 > index 000000000000..2b53dfa7c25e > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2712-msix.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Broadcom bcm2712 MSI-X Interrupt Peripheral support > + > +maintainers: > + - Stanimir Varbanov <svarbanov@suse.de> > + > +description: > Don't need '>' here. > + This interrupt controller is used to provide interrupt vectors to the > + generic interrupt controller (GIC) on bcm2712. It will be used as > + external MSI-X controller for PCIe root complex. > + > +allOf: > + - $ref: /schemas/interrupt-controller/msi-controller.yaml# > + > +properties: > + compatible: > + const: brcm,bcm2712-mip > + > + reg: > + items: > + - description: base registers address > + - description: pcie message address > + > + interrupt-controller: true > + > + "#interrupt-cells": > + const: 2 What goes in these cells? But really, what interrupts does an MSI controller handle? Or are we just putting "interrupt-controller" in here so that kernel handles this with IRQCHIP_DECLARE()? > + > + msi-controller: true Drop and use 'unevaluatedProperties'. > + > + "#msi-cells": > + enum: [0] const: 0 > + > + msi-ranges: true Drop. > + > +additionalProperties: false > + > +required: > + - compatible > + - reg > + - interrupt-controller > + - "#interrupt-cells" > + - msi-controller > + - msi-ranges > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + axi { > + #address-cells = <2>; > + #size-cells = <2>; > + > + msi-controller@1000130000 { > + compatible = "brcm,bcm2712-mip"; > + reg = <0x10 0x00130000 0x00 0xc0>, > + <0xff 0xfffff000 0x00 0x1000>; > + msi-controller; > + #msi-cells = <0>; > + interrupt-controller; > + #interrupt-cells = <2>; > + msi-ranges = <&gicv2 GIC_SPI 128 IRQ_TYPE_EDGE_RISING 64>; > + }; > + }; > -- > 2.35.3 >
Hi Rob, Thank you for the review comments! On 9/11/24 19:56, Rob Herring wrote: > On Tue, Sep 10, 2024 at 06:18:35PM +0300, Stanimir Varbanov wrote: >> Adds DT bindings for bcm2712 MSI-X interrupt peripheral controller. >> >> Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> >> --- >> .../brcm,bcm2712-msix.yaml | 69 +++++++++++++++++++ >> 1 file changed, 69 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml >> >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml >> new file mode 100644 >> index 000000000000..2b53dfa7c25e >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml >> @@ -0,0 +1,69 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2712-msix.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Broadcom bcm2712 MSI-X Interrupt Peripheral support >> + >> +maintainers: >> + - Stanimir Varbanov <svarbanov@suse.de> >> + >> +description: > > > Don't need '>' here. OK. > >> + This interrupt controller is used to provide interrupt vectors to the >> + generic interrupt controller (GIC) on bcm2712. It will be used as >> + external MSI-X controller for PCIe root complex. >> + >> +allOf: >> + - $ref: /schemas/interrupt-controller/msi-controller.yaml# >> + >> +properties: >> + compatible: >> + const: brcm,bcm2712-mip >> + >> + reg: >> + items: >> + - description: base registers address >> + - description: pcie message address >> + >> + interrupt-controller: true >> + >> + "#interrupt-cells": >> + const: 2 > > What goes in these cells? > > But really, what interrupts does an MSI controller handle? Or are we > just putting "interrupt-controller" in here so that kernel handles this > with IRQCHIP_DECLARE()? > Yes, looks like interrupt-controller property is need by IRQCHIP_DECLARE(). I will drop interrupt-controller/cells and convert the driver to use IRQCHIP_PLATFORM_DRIVER_BEGIN/END(). >> + >> + msi-controller: true > > Drop and use 'unevaluatedProperties'. OK. > >> + >> + "#msi-cells": >> + enum: [0] > > const: 0 OK. > >> + >> + msi-ranges: true > > Drop. OK. > >> + >> +additionalProperties: false >> + >> +required: >> + - compatible >> + - reg >> + - interrupt-controller >> + - "#interrupt-cells" >> + - msi-controller >> + - msi-ranges >> + >> +examples: >> + - | >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + >> + axi { >> + #address-cells = <2>; >> + #size-cells = <2>; >> + >> + msi-controller@1000130000 { >> + compatible = "brcm,bcm2712-mip"; >> + reg = <0x10 0x00130000 0x00 0xc0>, >> + <0xff 0xfffff000 0x00 0x1000>; >> + msi-controller; >> + #msi-cells = <0>; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + msi-ranges = <&gicv2 GIC_SPI 128 IRQ_TYPE_EDGE_RISING 64>; >> + }; >> + }; >> -- >> 2.35.3 >>
diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml new file mode 100644 index 000000000000..2b53dfa7c25e --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2712-msix.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom bcm2712 MSI-X Interrupt Peripheral support + +maintainers: + - Stanimir Varbanov <svarbanov@suse.de> + +description: > + This interrupt controller is used to provide interrupt vectors to the + generic interrupt controller (GIC) on bcm2712. It will be used as + external MSI-X controller for PCIe root complex. + +allOf: + - $ref: /schemas/interrupt-controller/msi-controller.yaml# + +properties: + compatible: + const: brcm,bcm2712-mip + + reg: + items: + - description: base registers address + - description: pcie message address + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + msi-controller: true + + "#msi-cells": + enum: [0] + + msi-ranges: true + +additionalProperties: false + +required: + - compatible + - reg + - interrupt-controller + - "#interrupt-cells" + - msi-controller + - msi-ranges + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + axi { + #address-cells = <2>; + #size-cells = <2>; + + msi-controller@1000130000 { + compatible = "brcm,bcm2712-mip"; + reg = <0x10 0x00130000 0x00 0xc0>, + <0xff 0xfffff000 0x00 0x1000>; + msi-controller; + #msi-cells = <0>; + interrupt-controller; + #interrupt-cells = <2>; + msi-ranges = <&gicv2 GIC_SPI 128 IRQ_TYPE_EDGE_RISING 64>; + }; + };
Adds DT bindings for bcm2712 MSI-X interrupt peripheral controller. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> --- .../brcm,bcm2712-msix.yaml | 69 +++++++++++++++++++ 1 file changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml