mbox series

[0/3] Add initial support for Canaan Kendryte K230 pinctrl

Message ID ZubtZKlxqejnCFx_@jean.localdomain (mailing list archive)
Headers show
Series Add initial support for Canaan Kendryte K230 pinctrl | expand

Message

Ze Huang Sept. 15, 2024, 2:21 p.m. UTC
This patch series introduces support for the pinctrl driver of the Canaan
K230 SoC. The K230 SoC features 64 IO pins, each of which can be configured
for up to five different functions.
							
The controller manages the entire pin configuration and multiplexing
through a single register, which control features such as schmitt trigger,
drive strength, bias pull-up/down, input/output enable, power source, and
mux mode.

The changes have been tested on the K230 development board.
							
The pin function definition can be found here [1], and most of the DTS data
was converted from the vendor's code [2].

Link: https://developer.canaan-creative.com/k230/dev/_downloads/a53655a81951bc8a440ae647be286e75/K230_PINOUT_V1.1_20230321.xlsx [1]
Link: https://github.com/kendryte/k230_sdk/blob/main/src/little/uboot/arch/riscv/dts/k230_canmv.dts [2]

Ze Huang (3):
  dt-bindings: pinctrl: Add support for canaan,k230 SoC
  pinctrl: canaan: Add support for k230 SoC
  riscv: dts: canaan: Add k230's pinctrl node

 .../bindings/pinctrl/canaan,k230-pinctrl.yaml | 128 ++++
 arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi  | 318 +++++++++
 arch/riscv/boot/dts/canaan/k230-pinctrl.h     |  18 +
 arch/riscv/boot/dts/canaan/k230.dtsi          |   2 +
 drivers/pinctrl/Kconfig                       |  10 +
 drivers/pinctrl/Makefile                      |   1 +
 drivers/pinctrl/pinctrl-k230.c                | 674 ++++++++++++++++++
 7 files changed, 1151 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/canaan,k230-pinctrl.yaml
 create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi
 create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.h
 create mode 100644 drivers/pinctrl/pinctrl-k230.c

Comments

Ze Huang Sept. 15, 2024, 3:22 p.m. UTC | #1
On 9/15/24 10:21 PM, Ze Huang wrote:
> This patch series introduces support for the pinctrl driver of the Canaan
> K230 SoC. The K230 SoC features 64 IO pins, each of which can be configured
> for up to five different functions.
> 							
> The controller manages the entire pin configuration and multiplexing
> through a single register, which control features such as schmitt trigger,
> drive strength, bias pull-up/down, input/output enable, power source, and
> mux mode.
>
> The changes have been tested on the K230 development board.
> 							
> The pin function definition can be found here [1], and most of the DTS data
> was converted from the vendor's code [2].
>
> Link: https://developer.canaan-creative.com/k230/dev/_downloads/a53655a81951bc8a440ae647be286e75/K230_PINOUT_V1.1_20230321.xlsx [1]
> Link: https://github.com/kendryte/k230_sdk/blob/main/src/little/uboot/arch/riscv/dts/k230_canmv.dts [2]
>
> Ze Huang (3):
>    dt-bindings: pinctrl: Add support for canaan,k230 SoC
>    pinctrl: canaan: Add support for k230 SoC
>    riscv: dts: canaan: Add k230's pinctrl node
>
>   .../bindings/pinctrl/canaan,k230-pinctrl.yaml | 128 ++++
>   arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi  | 318 +++++++++
>   arch/riscv/boot/dts/canaan/k230-pinctrl.h     |  18 +
>   arch/riscv/boot/dts/canaan/k230.dtsi          |   2 +
>   drivers/pinctrl/Kconfig                       |  10 +
>   drivers/pinctrl/Makefile                      |   1 +
>   drivers/pinctrl/pinctrl-k230.c                | 674 ++++++++++++++++++
>   7 files changed, 1151 insertions(+)
>   create mode 100644 Documentation/devicetree/bindings/pinctrl/canaan,k230-pinctrl.yaml
>   create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi
>   create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.h
>   create mode 100644 drivers/pinctrl/pinctrl-k230.c
>

lost base commit and prerequisite patch id here:

base-commit: 0eea987088a22d73d81e968de7347cdc7e594f72
prerequisite-patch-id: 740cbeb9fc3f3e3fd30df4914cd31e9eb148a581
prerequisite-patch-id: b5cc919a7e8e2f852569d5918944dbe4f21e6912
prerequisite-patch-id: 554cb838b7264109437359e88443cc3497ed344c
Conor Dooley Sept. 15, 2024, 7:35 p.m. UTC | #2
On Sun, Sep 15, 2024 at 11:22:16PM +0800, Ze Huang wrote:
> 
> On 9/15/24 10:21 PM, Ze Huang wrote:
> > This patch series introduces support for the pinctrl driver of the Canaan
> > K230 SoC. The K230 SoC features 64 IO pins, each of which can be configured
> > for up to five different functions.
> > 							
> > The controller manages the entire pin configuration and multiplexing
> > through a single register, which control features such as schmitt trigger,
> > drive strength, bias pull-up/down, input/output enable, power source, and
> > mux mode.
> > 
> > The changes have been tested on the K230 development board.
> > 							
> > The pin function definition can be found here [1], and most of the DTS data
> > was converted from the vendor's code [2].
> > 
> > Link: https://developer.canaan-creative.com/k230/dev/_downloads/a53655a81951bc8a440ae647be286e75/K230_PINOUT_V1.1_20230321.xlsx [1]
> > Link: https://github.com/kendryte/k230_sdk/blob/main/src/little/uboot/arch/riscv/dts/k230_canmv.dts [2]
> > 
> > Ze Huang (3):
> >    dt-bindings: pinctrl: Add support for canaan,k230 SoC
> >    pinctrl: canaan: Add support for k230 SoC
> >    riscv: dts: canaan: Add k230's pinctrl node
> > 
> >   .../bindings/pinctrl/canaan,k230-pinctrl.yaml | 128 ++++
> >   arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi  | 318 +++++++++
> >   arch/riscv/boot/dts/canaan/k230-pinctrl.h     |  18 +
> >   arch/riscv/boot/dts/canaan/k230.dtsi          |   2 +
> >   drivers/pinctrl/Kconfig                       |  10 +
> >   drivers/pinctrl/Makefile                      |   1 +
> >   drivers/pinctrl/pinctrl-k230.c                | 674 ++++++++++++++++++
> >   7 files changed, 1151 insertions(+)
> >   create mode 100644 Documentation/devicetree/bindings/pinctrl/canaan,k230-pinctrl.yaml
> >   create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi
> >   create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.h
> >   create mode 100644 drivers/pinctrl/pinctrl-k230.c
> > 
> 
> lost base commit and prerequisite patch id here:
> 
> base-commit: 0eea987088a22d73d81e968de7347cdc7e594f72
> prerequisite-patch-id: 740cbeb9fc3f3e3fd30df4914cd31e9eb148a581
> prerequisite-patch-id: b5cc919a7e8e2f852569d5918944dbe4f21e6912
> prerequisite-patch-id: 554cb838b7264109437359e88443cc3497ed344c

I don't have the ability to convert those to something I can understand,
is
https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=k230-basic
effectively the basis for your series?
Ze Huang Sept. 16, 2024, 3:50 a.m. UTC | #3
On 9/16/24 3:35 AM, Conor Dooley wrote:
> On Sun, Sep 15, 2024 at 11:22:16PM +0800, Ze Huang wrote:
>> On 9/15/24 10:21 PM, Ze Huang wrote:
>>> This patch series introduces support for the pinctrl driver of the Canaan
>>> K230 SoC. The K230 SoC features 64 IO pins, each of which can be configured
>>> for up to five different functions.
>>> 							
>>> The controller manages the entire pin configuration and multiplexing
>>> through a single register, which control features such as schmitt trigger,
>>> drive strength, bias pull-up/down, input/output enable, power source, and
>>> mux mode.
>>>
>>> The changes have been tested on the K230 development board.
>>> 							
>>> The pin function definition can be found here [1], and most of the DTS data
>>> was converted from the vendor's code [2].
>>>
>>> Link: https://developer.canaan-creative.com/k230/dev/_downloads/a53655a81951bc8a440ae647be286e75/K230_PINOUT_V1.1_20230321.xlsx [1]
>>> Link: https://github.com/kendryte/k230_sdk/blob/main/src/little/uboot/arch/riscv/dts/k230_canmv.dts [2]
>>>
>>> Ze Huang (3):
>>>     dt-bindings: pinctrl: Add support for canaan,k230 SoC
>>>     pinctrl: canaan: Add support for k230 SoC
>>>     riscv: dts: canaan: Add k230's pinctrl node
>>>
>>>    .../bindings/pinctrl/canaan,k230-pinctrl.yaml | 128 ++++
>>>    arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi  | 318 +++++++++
>>>    arch/riscv/boot/dts/canaan/k230-pinctrl.h     |  18 +
>>>    arch/riscv/boot/dts/canaan/k230.dtsi          |   2 +
>>>    drivers/pinctrl/Kconfig                       |  10 +
>>>    drivers/pinctrl/Makefile                      |   1 +
>>>    drivers/pinctrl/pinctrl-k230.c                | 674 ++++++++++++++++++
>>>    7 files changed, 1151 insertions(+)
>>>    create mode 100644 Documentation/devicetree/bindings/pinctrl/canaan,k230-pinctrl.yaml
>>>    create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.dtsi
>>>    create mode 100644 arch/riscv/boot/dts/canaan/k230-pinctrl.h
>>>    create mode 100644 drivers/pinctrl/pinctrl-k230.c
>>>
>> lost base commit and prerequisite patch id here:
>>
>> base-commit: 0eea987088a22d73d81e968de7347cdc7e594f72
>> prerequisite-patch-id: 740cbeb9fc3f3e3fd30df4914cd31e9eb148a581
>> prerequisite-patch-id: b5cc919a7e8e2f852569d5918944dbe4f21e6912
>> prerequisite-patch-id: 554cb838b7264109437359e88443cc3497ed344c
> I don't have the ability to convert those to something I can understand,
> is
> https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=k230-basic
> effectively the basis for your series?

Thank you for your understanding; that is indeed the basis for series.

base-commit: 0eea987088a22d73d81e968de7347cdc7e594f72
prerequisite-patch-id: 2401703b57448c9ea2c3dc7650b4502491a28944
prerequisite-patch-id: 50ccf1104191cdf22f9077880d3dc781b190a3c8
prerequisite-patch-id: f8b983b301d0c14f1448b9e4c321262a509e061e
prerequisite-patch-id: ced4a01ccd8ddab2fd308d543ddf47bd1641518a
prerequisite-patch-id: c2144cf468c57b856830a61615ba6ba501e8ec58
prerequisite-patch-id: 704efc6e76814e1877748959d7319d558c8386c1

Link: 
https://lore.kernel.org/all/tencent_22BA0425B4DF1CA1713B62E4423C1BFBF809@qq.com/