| Message ID | 20241016114915.2823-3-linux.amoon@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | PCIe RK3399 clock and reset using new helper functions | expand |
On Wed, Oct 16, 2024 at 05:19:07PM +0530, Anand Moon wrote: > Currently, the driver acquires and asserts/deasserts the resets > individually thereby making the driver complex to read. But this > can be simplified by using the reset_control_bulk APIs. > Use devm_reset_control_bulk_get_exclusive() API to acquire all > the resets and use reset_control_bulk_{assert/deassert}() APIs to > assert/deassert them in bulk. > > Following the recommendations in 'Rockchip RK3399 TRM v1.3 Part2': > > 1. Split the reset controls into two groups as per section '17.5.8.1.1 PCIe > as Root Complex'. > > 2. Deassert the 'Pipe, MGMT Sticky, MGMT, Core' resets in groups as per > section '17.5.8.1.1 PCIe as Root Complex'. This is accomplished using the > reset_control_bulk APIs. > > Signed-off-by: Anand Moon <linux.amoon@gmail.com> > --- > v9: Improved the commit message and try to fix few review comments. You haven't fixed all of them... Please take a look at all of my comments. - Mani > v8: I tried to address reviews and comments from Mani. > Follow the sequence of De-assert as per the driver code. > Drop the comment in the driver. > Improve the commit message with the description of the TMP section. > Improve the reason for the core functional changes in the commit > description. > Improve the error handling messages of the code. > v7: replace devm_reset_control_bulk_get_optional_exclusive() > with devm_reset_control_bulk_get_exclusive() > update the functional changes. > V6: Add reason for the split of the RESET pins. > v5: Fix the De-assert reset core as per the TRM > De-assert the PIPE_RESET_N/MGMT_STICKY_RESET_N/MGMT_RESET_N/RESET_N > simultaneously. > v4: use dev_err_probe in error path. > v3: Fix typo in commit message, dropped reported by. > v2: Fix compilation error reported by Intel test robot > fixed checkpatch warning. > --- > drivers/pci/controller/pcie-rockchip.c | 154 +++++-------------------- > drivers/pci/controller/pcie-rockchip.h | 26 +++-- > 2 files changed, 48 insertions(+), 132 deletions(-) > > diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c > index 2777ef0cb599..adf11208cc82 100644 > --- a/drivers/pci/controller/pcie-rockchip.c > +++ b/drivers/pci/controller/pcie-rockchip.c > @@ -30,7 +30,7 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) > struct platform_device *pdev = to_platform_device(dev); > struct device_node *node = dev->of_node; > struct resource *regs; > - int err; > + int err, i; > > if (rockchip->is_rc) { > regs = platform_get_resource_byname(pdev, > @@ -69,55 +69,23 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) > if (rockchip->link_gen < 0 || rockchip->link_gen > 2) > rockchip->link_gen = 2; > > - rockchip->core_rst = devm_reset_control_get_exclusive(dev, "core"); > - if (IS_ERR(rockchip->core_rst)) { > - if (PTR_ERR(rockchip->core_rst) != -EPROBE_DEFER) > - dev_err(dev, "missing core reset property in node\n"); > - return PTR_ERR(rockchip->core_rst); > - } > - > - rockchip->mgmt_rst = devm_reset_control_get_exclusive(dev, "mgmt"); > - if (IS_ERR(rockchip->mgmt_rst)) { > - if (PTR_ERR(rockchip->mgmt_rst) != -EPROBE_DEFER) > - dev_err(dev, "missing mgmt reset property in node\n"); > - return PTR_ERR(rockchip->mgmt_rst); > - } > - > - rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev, > - "mgmt-sticky"); > - if (IS_ERR(rockchip->mgmt_sticky_rst)) { > - if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER) > - dev_err(dev, "missing mgmt-sticky reset property in node\n"); > - return PTR_ERR(rockchip->mgmt_sticky_rst); > - } > - > - rockchip->pipe_rst = devm_reset_control_get_exclusive(dev, "pipe"); > - if (IS_ERR(rockchip->pipe_rst)) { > - if (PTR_ERR(rockchip->pipe_rst) != -EPROBE_DEFER) > - dev_err(dev, "missing pipe reset property in node\n"); > - return PTR_ERR(rockchip->pipe_rst); > - } > + for (i = 0; i < ROCKCHIP_NUM_PM_RSTS; i++) > + rockchip->pm_rsts[i].id = rockchip_pci_pm_rsts[i]; > > - rockchip->pm_rst = devm_reset_control_get_exclusive(dev, "pm"); > - if (IS_ERR(rockchip->pm_rst)) { > - if (PTR_ERR(rockchip->pm_rst) != -EPROBE_DEFER) > - dev_err(dev, "missing pm reset property in node\n"); > - return PTR_ERR(rockchip->pm_rst); > - } > + err = devm_reset_control_bulk_get_exclusive(dev, > + ROCKCHIP_NUM_PM_RSTS, > + rockchip->pm_rsts); > + if (err) > + return dev_err_probe(dev, err, "Cannot get the PM reset\n"); > > - rockchip->pclk_rst = devm_reset_control_get_exclusive(dev, "pclk"); > - if (IS_ERR(rockchip->pclk_rst)) { > - if (PTR_ERR(rockchip->pclk_rst) != -EPROBE_DEFER) > - dev_err(dev, "missing pclk reset property in node\n"); > - return PTR_ERR(rockchip->pclk_rst); > - } > + for (i = 0; i < ROCKCHIP_NUM_CORE_RSTS; i++) > + rockchip->core_rsts[i].id = rockchip_pci_core_rsts[i]; > > - rockchip->aclk_rst = devm_reset_control_get_exclusive(dev, "aclk"); > - if (IS_ERR(rockchip->aclk_rst)) { > - if (PTR_ERR(rockchip->aclk_rst) != -EPROBE_DEFER) > - dev_err(dev, "missing aclk reset property in node\n"); > - return PTR_ERR(rockchip->aclk_rst); > - } > + err = devm_reset_control_bulk_get_exclusive(dev, > + ROCKCHIP_NUM_CORE_RSTS, > + rockchip->core_rsts); > + if (err) > + return dev_err_probe(dev, err, "Cannot get the CORE resets\n"); > > if (rockchip->is_rc) { > rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", > @@ -147,23 +115,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) > int err, i; > u32 regs; > > - err = reset_control_assert(rockchip->aclk_rst); > - if (err) { > - dev_err(dev, "assert aclk_rst err %d\n", err); > - return err; > - } > - > - err = reset_control_assert(rockchip->pclk_rst); > - if (err) { > - dev_err(dev, "assert pclk_rst err %d\n", err); > - return err; > - } > - > - err = reset_control_assert(rockchip->pm_rst); > - if (err) { > - dev_err(dev, "assert pm_rst err %d\n", err); > - return err; > - } > + err = reset_control_bulk_assert(ROCKCHIP_NUM_PM_RSTS, > + rockchip->pm_rsts); > + if (err) > + return dev_err_probe(dev, err, "Couldn't assert PM resets\n"); > > for (i = 0; i < MAX_LANE_NUM; i++) { > err = phy_init(rockchip->phys[i]); > @@ -173,47 +128,17 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) > } > } > > - err = reset_control_assert(rockchip->core_rst); > - if (err) { > - dev_err(dev, "assert core_rst err %d\n", err); > - goto err_exit_phy; > - } > - > - err = reset_control_assert(rockchip->mgmt_rst); > - if (err) { > - dev_err(dev, "assert mgmt_rst err %d\n", err); > - goto err_exit_phy; > - } > - > - err = reset_control_assert(rockchip->mgmt_sticky_rst); > - if (err) { > - dev_err(dev, "assert mgmt_sticky_rst err %d\n", err); > - goto err_exit_phy; > - } > - > - err = reset_control_assert(rockchip->pipe_rst); > - if (err) { > - dev_err(dev, "assert pipe_rst err %d\n", err); > - goto err_exit_phy; > - } > + err = reset_control_bulk_assert(ROCKCHIP_NUM_CORE_RSTS, > + rockchip->core_rsts); > + if (err) > + return dev_err_probe(dev, err, "Couldn't assert Core resets\n"); > > udelay(10); > > - err = reset_control_deassert(rockchip->pm_rst); > - if (err) { > - dev_err(dev, "deassert pm_rst err %d\n", err); > - goto err_exit_phy; > - } > - > - err = reset_control_deassert(rockchip->aclk_rst); > + err = reset_control_bulk_deassert(ROCKCHIP_NUM_PM_RSTS, > + rockchip->pm_rsts); > if (err) { > - dev_err(dev, "deassert aclk_rst err %d\n", err); > - goto err_exit_phy; > - } > - > - err = reset_control_deassert(rockchip->pclk_rst); > - if (err) { > - dev_err(dev, "deassert pclk_rst err %d\n", err); > + dev_err(dev, "Couldn't deassert PM resets %d\n", err); > goto err_exit_phy; > } > > @@ -252,31 +177,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) > goto err_power_off_phy; > } > > - /* > - * Please don't reorder the deassert sequence of the following > - * four reset pins. > - */ > - err = reset_control_deassert(rockchip->mgmt_sticky_rst); > - if (err) { > - dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); > - goto err_power_off_phy; > - } > - > - err = reset_control_deassert(rockchip->core_rst); > - if (err) { > - dev_err(dev, "deassert core_rst err %d\n", err); > - goto err_power_off_phy; > - } > - > - err = reset_control_deassert(rockchip->mgmt_rst); > - if (err) { > - dev_err(dev, "deassert mgmt_rst err %d\n", err); > - goto err_power_off_phy; > - } > - > - err = reset_control_deassert(rockchip->pipe_rst); > + err = reset_control_bulk_deassert(ROCKCHIP_NUM_CORE_RSTS, > + rockchip->core_rsts); > if (err) { > - dev_err(dev, "deassert pipe_rst err %d\n", err); > + dev_err(dev, "Couldn't deassert CORE %d\n", err); > goto err_power_off_phy; > } > > diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h > index bebab80c9553..cc667c73d42f 100644 > --- a/drivers/pci/controller/pcie-rockchip.h > +++ b/drivers/pci/controller/pcie-rockchip.h > @@ -15,6 +15,7 @@ > #include <linux/kernel.h> > #include <linux/pci.h> > #include <linux/pci-ecam.h> > +#include <linux/reset.h> > > /* > * The upper 16 bits of PCIE_CLIENT_CONFIG are a write mask for the lower 16 > @@ -288,18 +289,29 @@ > (((c) << ((b) * 8 + 5)) & \ > ROCKCHIP_PCIE_CORE_EP_FUNC_BAR_CFG_BAR_CTRL_MASK(b)) > > +#define ROCKCHIP_NUM_PM_RSTS ARRAY_SIZE(rockchip_pci_pm_rsts) > +#define ROCKCHIP_NUM_CORE_RSTS ARRAY_SIZE(rockchip_pci_core_rsts) > + > +static const char * const rockchip_pci_pm_rsts[] = { > + "pm", > + "pclk", > + "aclk", > +}; > + > +static const char * const rockchip_pci_core_rsts[] = { > + "mgmt-sticky", > + "core", > + "mgmt", > + "pipe", > +}; > + > struct rockchip_pcie { > void __iomem *reg_base; /* DT axi-base */ > void __iomem *apb_base; /* DT apb-base */ > bool legacy_phy; > struct phy *phys[MAX_LANE_NUM]; > - struct reset_control *core_rst; > - struct reset_control *mgmt_rst; > - struct reset_control *mgmt_sticky_rst; > - struct reset_control *pipe_rst; > - struct reset_control *pm_rst; > - struct reset_control *aclk_rst; > - struct reset_control *pclk_rst; > + struct reset_control_bulk_data pm_rsts[ROCKCHIP_NUM_PM_RSTS]; > + struct reset_control_bulk_data core_rsts[ROCKCHIP_NUM_CORE_RSTS]; > struct clk_bulk_data *clks; > int num_clks; > struct regulator *vpcie12v; /* 12V power supply */ > -- > 2.44.0 >
Hi Manivannan, On Wed, 16 Oct 2024 at 23:53, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote: > > On Wed, Oct 16, 2024 at 05:19:07PM +0530, Anand Moon wrote: > > Currently, the driver acquires and asserts/deasserts the resets > > individually thereby making the driver complex to read. But this > > can be simplified by using the reset_control_bulk APIs. > > Use devm_reset_control_bulk_get_exclusive() API to acquire all > > the resets and use reset_control_bulk_{assert/deassert}() APIs to > > assert/deassert them in bulk. > > > > Following the recommendations in 'Rockchip RK3399 TRM v1.3 Part2': > > > > 1. Split the reset controls into two groups as per section '17.5.8.1.1 PCIe > > as Root Complex'. > > > > 2. Deassert the 'Pipe, MGMT Sticky, MGMT, Core' resets in groups as per > > section '17.5.8.1.1 PCIe as Root Complex'. This is accomplished using the > > reset_control_bulk APIs. > > > > Signed-off-by: Anand Moon <linux.amoon@gmail.com> > > --- > > v9: Improved the commit message and try to fix few review comments. > > You haven't fixed all of them... Please take a look at all of my comments. It is becoming a nightmare for me, my confidence is a the lowest. Can you fix this while applying or I will resend it with the fix? > > - Mani > Thanks -Anand > > v8: I tried to address reviews and comments from Mani. > > Follow the sequence of De-assert as per the driver code. > > Drop the comment in the driver. > > Improve the commit message with the description of the TMP section. > > Improve the reason for the core functional changes in the commit > > description. > > Improve the error handling messages of the code. > > v7: replace devm_reset_control_bulk_get_optional_exclusive() > > with devm_reset_control_bulk_get_exclusive() > > update the functional changes. > > V6: Add reason for the split of the RESET pins. > > v5: Fix the De-assert reset core as per the TRM > > De-assert the PIPE_RESET_N/MGMT_STICKY_RESET_N/MGMT_RESET_N/RESET_N > > simultaneously. > > v4: use dev_err_probe in error path. > > v3: Fix typo in commit message, dropped reported by. > > v2: Fix compilation error reported by Intel test robot > > fixed checkpatch warning. > > --- > > drivers/pci/controller/pcie-rockchip.c | 154 +++++-------------------- > > drivers/pci/controller/pcie-rockchip.h | 26 +++-- > > 2 files changed, 48 insertions(+), 132 deletions(-) > > > > diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c > > index 2777ef0cb599..adf11208cc82 100644 > > --- a/drivers/pci/controller/pcie-rockchip.c > > +++ b/drivers/pci/controller/pcie-rockchip.c > > @@ -30,7 +30,7 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) > > struct platform_device *pdev = to_platform_device(dev); > > struct device_node *node = dev->of_node; > > struct resource *regs; > > - int err; > > + int err, i; > > > > if (rockchip->is_rc) { > > regs = platform_get_resource_byname(pdev, > > @@ -69,55 +69,23 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) > > if (rockchip->link_gen < 0 || rockchip->link_gen > 2) > > rockchip->link_gen = 2; > > > > - rockchip->core_rst = devm_reset_control_get_exclusive(dev, "core"); > > - if (IS_ERR(rockchip->core_rst)) { > > - if (PTR_ERR(rockchip->core_rst) != -EPROBE_DEFER) > > - dev_err(dev, "missing core reset property in node\n"); > > - return PTR_ERR(rockchip->core_rst); > > - } > > - > > - rockchip->mgmt_rst = devm_reset_control_get_exclusive(dev, "mgmt"); > > - if (IS_ERR(rockchip->mgmt_rst)) { > > - if (PTR_ERR(rockchip->mgmt_rst) != -EPROBE_DEFER) > > - dev_err(dev, "missing mgmt reset property in node\n"); > > - return PTR_ERR(rockchip->mgmt_rst); > > - } > > - > > - rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev, > > - "mgmt-sticky"); > > - if (IS_ERR(rockchip->mgmt_sticky_rst)) { > > - if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER) > > - dev_err(dev, "missing mgmt-sticky reset property in node\n"); > > - return PTR_ERR(rockchip->mgmt_sticky_rst); > > - } > > - > > - rockchip->pipe_rst = devm_reset_control_get_exclusive(dev, "pipe"); > > - if (IS_ERR(rockchip->pipe_rst)) { > > - if (PTR_ERR(rockchip->pipe_rst) != -EPROBE_DEFER) > > - dev_err(dev, "missing pipe reset property in node\n"); > > - return PTR_ERR(rockchip->pipe_rst); > > - } > > + for (i = 0; i < ROCKCHIP_NUM_PM_RSTS; i++) > > + rockchip->pm_rsts[i].id = rockchip_pci_pm_rsts[i]; > > > > - rockchip->pm_rst = devm_reset_control_get_exclusive(dev, "pm"); > > - if (IS_ERR(rockchip->pm_rst)) { > > - if (PTR_ERR(rockchip->pm_rst) != -EPROBE_DEFER) > > - dev_err(dev, "missing pm reset property in node\n"); > > - return PTR_ERR(rockchip->pm_rst); > > - } > > + err = devm_reset_control_bulk_get_exclusive(dev, > > + ROCKCHIP_NUM_PM_RSTS, > > + rockchip->pm_rsts); > > + if (err) > > + return dev_err_probe(dev, err, "Cannot get the PM reset\n"); > > > > - rockchip->pclk_rst = devm_reset_control_get_exclusive(dev, "pclk"); > > - if (IS_ERR(rockchip->pclk_rst)) { > > - if (PTR_ERR(rockchip->pclk_rst) != -EPROBE_DEFER) > > - dev_err(dev, "missing pclk reset property in node\n"); > > - return PTR_ERR(rockchip->pclk_rst); > > - } > > + for (i = 0; i < ROCKCHIP_NUM_CORE_RSTS; i++) > > + rockchip->core_rsts[i].id = rockchip_pci_core_rsts[i]; > > > > - rockchip->aclk_rst = devm_reset_control_get_exclusive(dev, "aclk"); > > - if (IS_ERR(rockchip->aclk_rst)) { > > - if (PTR_ERR(rockchip->aclk_rst) != -EPROBE_DEFER) > > - dev_err(dev, "missing aclk reset property in node\n"); > > - return PTR_ERR(rockchip->aclk_rst); > > - } > > + err = devm_reset_control_bulk_get_exclusive(dev, > > + ROCKCHIP_NUM_CORE_RSTS, > > + rockchip->core_rsts); > > + if (err) > > + return dev_err_probe(dev, err, "Cannot get the CORE resets\n"); > > > > if (rockchip->is_rc) { > > rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", > > @@ -147,23 +115,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) > > int err, i; > > u32 regs; > > > > - err = reset_control_assert(rockchip->aclk_rst); > > - if (err) { > > - dev_err(dev, "assert aclk_rst err %d\n", err); > > - return err; > > - } > > - > > - err = reset_control_assert(rockchip->pclk_rst); > > - if (err) { > > - dev_err(dev, "assert pclk_rst err %d\n", err); > > - return err; > > - } > > - > > - err = reset_control_assert(rockchip->pm_rst); > > - if (err) { > > - dev_err(dev, "assert pm_rst err %d\n", err); > > - return err; > > - } > > + err = reset_control_bulk_assert(ROCKCHIP_NUM_PM_RSTS, > > + rockchip->pm_rsts); > > + if (err) > > + return dev_err_probe(dev, err, "Couldn't assert PM resets\n"); > > > > for (i = 0; i < MAX_LANE_NUM; i++) { > > err = phy_init(rockchip->phys[i]); > > @@ -173,47 +128,17 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) > > } > > } > > > > - err = reset_control_assert(rockchip->core_rst); > > - if (err) { > > - dev_err(dev, "assert core_rst err %d\n", err); > > - goto err_exit_phy; > > - } > > - > > - err = reset_control_assert(rockchip->mgmt_rst); > > - if (err) { > > - dev_err(dev, "assert mgmt_rst err %d\n", err); > > - goto err_exit_phy; > > - } > > - > > - err = reset_control_assert(rockchip->mgmt_sticky_rst); > > - if (err) { > > - dev_err(dev, "assert mgmt_sticky_rst err %d\n", err); > > - goto err_exit_phy; > > - } > > - > > - err = reset_control_assert(rockchip->pipe_rst); > > - if (err) { > > - dev_err(dev, "assert pipe_rst err %d\n", err); > > - goto err_exit_phy; > > - } > > + err = reset_control_bulk_assert(ROCKCHIP_NUM_CORE_RSTS, > > + rockchip->core_rsts); > > + if (err) > > + return dev_err_probe(dev, err, "Couldn't assert Core resets\n"); > > > > udelay(10); > > > > - err = reset_control_deassert(rockchip->pm_rst); > > - if (err) { > > - dev_err(dev, "deassert pm_rst err %d\n", err); > > - goto err_exit_phy; > > - } > > - > > - err = reset_control_deassert(rockchip->aclk_rst); > > + err = reset_control_bulk_deassert(ROCKCHIP_NUM_PM_RSTS, > > + rockchip->pm_rsts); > > if (err) { > > - dev_err(dev, "deassert aclk_rst err %d\n", err); > > - goto err_exit_phy; > > - } > > - > > - err = reset_control_deassert(rockchip->pclk_rst); > > - if (err) { > > - dev_err(dev, "deassert pclk_rst err %d\n", err); > > + dev_err(dev, "Couldn't deassert PM resets %d\n", err); > > goto err_exit_phy; > > } > > > > @@ -252,31 +177,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) > > goto err_power_off_phy; > > } > > > > - /* > > - * Please don't reorder the deassert sequence of the following > > - * four reset pins. > > - */ > > - err = reset_control_deassert(rockchip->mgmt_sticky_rst); > > - if (err) { > > - dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); > > - goto err_power_off_phy; > > - } > > - > > - err = reset_control_deassert(rockchip->core_rst); > > - if (err) { > > - dev_err(dev, "deassert core_rst err %d\n", err); > > - goto err_power_off_phy; > > - } > > - > > - err = reset_control_deassert(rockchip->mgmt_rst); > > - if (err) { > > - dev_err(dev, "deassert mgmt_rst err %d\n", err); > > - goto err_power_off_phy; > > - } > > - > > - err = reset_control_deassert(rockchip->pipe_rst); > > + err = reset_control_bulk_deassert(ROCKCHIP_NUM_CORE_RSTS, > > + rockchip->core_rsts); > > if (err) { > > - dev_err(dev, "deassert pipe_rst err %d\n", err); > > + dev_err(dev, "Couldn't deassert CORE %d\n", err); ok, it shipped my review process. > > goto err_power_off_phy; > > } > > > > diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h > > index bebab80c9553..cc667c73d42f 100644 > > --- a/drivers/pci/controller/pcie-rockchip.h > > +++ b/drivers/pci/controller/pcie-rockchip.h > > @@ -15,6 +15,7 @@ > > #include <linux/kernel.h> > > #include <linux/pci.h> > > #include <linux/pci-ecam.h> > > +#include <linux/reset.h> > > > > /* > > * The upper 16 bits of PCIE_CLIENT_CONFIG are a write mask for the lower 16 > > @@ -288,18 +289,29 @@ > > (((c) << ((b) * 8 + 5)) & \ > > ROCKCHIP_PCIE_CORE_EP_FUNC_BAR_CFG_BAR_CTRL_MASK(b)) > > > > +#define ROCKCHIP_NUM_PM_RSTS ARRAY_SIZE(rockchip_pci_pm_rsts) > > +#define ROCKCHIP_NUM_CORE_RSTS ARRAY_SIZE(rockchip_pci_core_rsts) > > + > > +static const char * const rockchip_pci_pm_rsts[] = { > > + "pm", > > + "pclk", > > + "aclk", > > +}; > > + > > +static const char * const rockchip_pci_core_rsts[] = { > > + "mgmt-sticky", > > + "core", > > + "mgmt", > > + "pipe", > > +}; > > + > > struct rockchip_pcie { > > void __iomem *reg_base; /* DT axi-base */ > > void __iomem *apb_base; /* DT apb-base */ > > bool legacy_phy; > > struct phy *phys[MAX_LANE_NUM]; > > - struct reset_control *core_rst; > > - struct reset_control *mgmt_rst; > > - struct reset_control *mgmt_sticky_rst; > > - struct reset_control *pipe_rst; > > - struct reset_control *pm_rst; > > - struct reset_control *aclk_rst; > > - struct reset_control *pclk_rst; > > + struct reset_control_bulk_data pm_rsts[ROCKCHIP_NUM_PM_RSTS]; > > + struct reset_control_bulk_data core_rsts[ROCKCHIP_NUM_CORE_RSTS]; > > struct clk_bulk_data *clks; > > int num_clks; > > struct regulator *vpcie12v; /* 12V power supply */ > > -- > > 2.44.0 > > > > -- > மணிவண்ணன் சதாசிவம்
On Thu, Oct 17, 2024 at 09:17:35AM +0530, Anand Moon wrote: > Hi Manivannan, > > On Wed, 16 Oct 2024 at 23:53, Manivannan Sadhasivam > <manivannan.sadhasivam@linaro.org> wrote: > > > > On Wed, Oct 16, 2024 at 05:19:07PM +0530, Anand Moon wrote: > > > Currently, the driver acquires and asserts/deasserts the resets > > > individually thereby making the driver complex to read. But this > > > can be simplified by using the reset_control_bulk APIs. > > > Use devm_reset_control_bulk_get_exclusive() API to acquire all > > > the resets and use reset_control_bulk_{assert/deassert}() APIs to > > > assert/deassert them in bulk. > > > > > > Following the recommendations in 'Rockchip RK3399 TRM v1.3 Part2': > > > > > > 1. Split the reset controls into two groups as per section '17.5.8.1.1 PCIe > > > as Root Complex'. > > > > > > 2. Deassert the 'Pipe, MGMT Sticky, MGMT, Core' resets in groups as per > > > section '17.5.8.1.1 PCIe as Root Complex'. This is accomplished using the > > > reset_control_bulk APIs. > > > > > > Signed-off-by: Anand Moon <linux.amoon@gmail.com> > > > --- > > > v9: Improved the commit message and try to fix few review comments. > > > > You haven't fixed all of them... Please take a look at all of my comments. > > It is becoming a nightmare for me, my confidence is a the lowest. Me too. It makes me go crazy if the trivial comments are not addressed in multiple revisions and it results in waste of time for both of us. > Can you fix this while applying or I will resend it with the fix? I don't merge the dwc patches, so I cannot do that. But what's preventing you from addressing those comments. You cannot put the burden on the maintainers for your mistake, sorry. - Mani > > > > - Mani > > > Thanks > -Anand > > > > v8: I tried to address reviews and comments from Mani. > > > Follow the sequence of De-assert as per the driver code. > > > Drop the comment in the driver. > > > Improve the commit message with the description of the TMP section. > > > Improve the reason for the core functional changes in the commit > > > description. > > > Improve the error handling messages of the code. > > > v7: replace devm_reset_control_bulk_get_optional_exclusive() > > > with devm_reset_control_bulk_get_exclusive() > > > update the functional changes. > > > V6: Add reason for the split of the RESET pins. > > > v5: Fix the De-assert reset core as per the TRM > > > De-assert the PIPE_RESET_N/MGMT_STICKY_RESET_N/MGMT_RESET_N/RESET_N > > > simultaneously. > > > v4: use dev_err_probe in error path. > > > v3: Fix typo in commit message, dropped reported by. > > > v2: Fix compilation error reported by Intel test robot > > > fixed checkpatch warning. > > > --- > > > drivers/pci/controller/pcie-rockchip.c | 154 +++++-------------------- > > > drivers/pci/controller/pcie-rockchip.h | 26 +++-- > > > 2 files changed, 48 insertions(+), 132 deletions(-) > > > > > > diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c > > > index 2777ef0cb599..adf11208cc82 100644 > > > --- a/drivers/pci/controller/pcie-rockchip.c > > > +++ b/drivers/pci/controller/pcie-rockchip.c > > > @@ -30,7 +30,7 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) > > > struct platform_device *pdev = to_platform_device(dev); > > > struct device_node *node = dev->of_node; > > > struct resource *regs; > > > - int err; > > > + int err, i; > > > > > > if (rockchip->is_rc) { > > > regs = platform_get_resource_byname(pdev, > > > @@ -69,55 +69,23 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) > > > if (rockchip->link_gen < 0 || rockchip->link_gen > 2) > > > rockchip->link_gen = 2; > > > > > > - rockchip->core_rst = devm_reset_control_get_exclusive(dev, "core"); > > > - if (IS_ERR(rockchip->core_rst)) { > > > - if (PTR_ERR(rockchip->core_rst) != -EPROBE_DEFER) > > > - dev_err(dev, "missing core reset property in node\n"); > > > - return PTR_ERR(rockchip->core_rst); > > > - } > > > - > > > - rockchip->mgmt_rst = devm_reset_control_get_exclusive(dev, "mgmt"); > > > - if (IS_ERR(rockchip->mgmt_rst)) { > > > - if (PTR_ERR(rockchip->mgmt_rst) != -EPROBE_DEFER) > > > - dev_err(dev, "missing mgmt reset property in node\n"); > > > - return PTR_ERR(rockchip->mgmt_rst); > > > - } > > > - > > > - rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev, > > > - "mgmt-sticky"); > > > - if (IS_ERR(rockchip->mgmt_sticky_rst)) { > > > - if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER) > > > - dev_err(dev, "missing mgmt-sticky reset property in node\n"); > > > - return PTR_ERR(rockchip->mgmt_sticky_rst); > > > - } > > > - > > > - rockchip->pipe_rst = devm_reset_control_get_exclusive(dev, "pipe"); > > > - if (IS_ERR(rockchip->pipe_rst)) { > > > - if (PTR_ERR(rockchip->pipe_rst) != -EPROBE_DEFER) > > > - dev_err(dev, "missing pipe reset property in node\n"); > > > - return PTR_ERR(rockchip->pipe_rst); > > > - } > > > + for (i = 0; i < ROCKCHIP_NUM_PM_RSTS; i++) > > > + rockchip->pm_rsts[i].id = rockchip_pci_pm_rsts[i]; > > > > > > - rockchip->pm_rst = devm_reset_control_get_exclusive(dev, "pm"); > > > - if (IS_ERR(rockchip->pm_rst)) { > > > - if (PTR_ERR(rockchip->pm_rst) != -EPROBE_DEFER) > > > - dev_err(dev, "missing pm reset property in node\n"); > > > - return PTR_ERR(rockchip->pm_rst); > > > - } > > > + err = devm_reset_control_bulk_get_exclusive(dev, > > > + ROCKCHIP_NUM_PM_RSTS, > > > + rockchip->pm_rsts); > > > + if (err) > > > + return dev_err_probe(dev, err, "Cannot get the PM reset\n"); > > > > > > - rockchip->pclk_rst = devm_reset_control_get_exclusive(dev, "pclk"); > > > - if (IS_ERR(rockchip->pclk_rst)) { > > > - if (PTR_ERR(rockchip->pclk_rst) != -EPROBE_DEFER) > > > - dev_err(dev, "missing pclk reset property in node\n"); > > > - return PTR_ERR(rockchip->pclk_rst); > > > - } > > > + for (i = 0; i < ROCKCHIP_NUM_CORE_RSTS; i++) > > > + rockchip->core_rsts[i].id = rockchip_pci_core_rsts[i]; > > > > > > - rockchip->aclk_rst = devm_reset_control_get_exclusive(dev, "aclk"); > > > - if (IS_ERR(rockchip->aclk_rst)) { > > > - if (PTR_ERR(rockchip->aclk_rst) != -EPROBE_DEFER) > > > - dev_err(dev, "missing aclk reset property in node\n"); > > > - return PTR_ERR(rockchip->aclk_rst); > > > - } > > > + err = devm_reset_control_bulk_get_exclusive(dev, > > > + ROCKCHIP_NUM_CORE_RSTS, > > > + rockchip->core_rsts); > > > + if (err) > > > + return dev_err_probe(dev, err, "Cannot get the CORE resets\n"); > > > > > > if (rockchip->is_rc) { > > > rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", > > > @@ -147,23 +115,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) > > > int err, i; > > > u32 regs; > > > > > > - err = reset_control_assert(rockchip->aclk_rst); > > > - if (err) { > > > - dev_err(dev, "assert aclk_rst err %d\n", err); > > > - return err; > > > - } > > > - > > > - err = reset_control_assert(rockchip->pclk_rst); > > > - if (err) { > > > - dev_err(dev, "assert pclk_rst err %d\n", err); > > > - return err; > > > - } > > > - > > > - err = reset_control_assert(rockchip->pm_rst); > > > - if (err) { > > > - dev_err(dev, "assert pm_rst err %d\n", err); > > > - return err; > > > - } > > > + err = reset_control_bulk_assert(ROCKCHIP_NUM_PM_RSTS, > > > + rockchip->pm_rsts); > > > + if (err) > > > + return dev_err_probe(dev, err, "Couldn't assert PM resets\n"); > > > > > > for (i = 0; i < MAX_LANE_NUM; i++) { > > > err = phy_init(rockchip->phys[i]); > > > @@ -173,47 +128,17 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) > > > } > > > } > > > > > > - err = reset_control_assert(rockchip->core_rst); > > > - if (err) { > > > - dev_err(dev, "assert core_rst err %d\n", err); > > > - goto err_exit_phy; > > > - } > > > - > > > - err = reset_control_assert(rockchip->mgmt_rst); > > > - if (err) { > > > - dev_err(dev, "assert mgmt_rst err %d\n", err); > > > - goto err_exit_phy; > > > - } > > > - > > > - err = reset_control_assert(rockchip->mgmt_sticky_rst); > > > - if (err) { > > > - dev_err(dev, "assert mgmt_sticky_rst err %d\n", err); > > > - goto err_exit_phy; > > > - } > > > - > > > - err = reset_control_assert(rockchip->pipe_rst); > > > - if (err) { > > > - dev_err(dev, "assert pipe_rst err %d\n", err); > > > - goto err_exit_phy; > > > - } > > > + err = reset_control_bulk_assert(ROCKCHIP_NUM_CORE_RSTS, > > > + rockchip->core_rsts); > > > + if (err) > > > + return dev_err_probe(dev, err, "Couldn't assert Core resets\n"); > > > > > > udelay(10); > > > > > > - err = reset_control_deassert(rockchip->pm_rst); > > > - if (err) { > > > - dev_err(dev, "deassert pm_rst err %d\n", err); > > > - goto err_exit_phy; > > > - } > > > - > > > - err = reset_control_deassert(rockchip->aclk_rst); > > > + err = reset_control_bulk_deassert(ROCKCHIP_NUM_PM_RSTS, > > > + rockchip->pm_rsts); > > > if (err) { > > > - dev_err(dev, "deassert aclk_rst err %d\n", err); > > > - goto err_exit_phy; > > > - } > > > - > > > - err = reset_control_deassert(rockchip->pclk_rst); > > > - if (err) { > > > - dev_err(dev, "deassert pclk_rst err %d\n", err); > > > + dev_err(dev, "Couldn't deassert PM resets %d\n", err); > > > goto err_exit_phy; > > > } > > > > > > @@ -252,31 +177,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) > > > goto err_power_off_phy; > > > } > > > > > > - /* > > > - * Please don't reorder the deassert sequence of the following > > > - * four reset pins. > > > - */ > > > - err = reset_control_deassert(rockchip->mgmt_sticky_rst); > > > - if (err) { > > > - dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); > > > - goto err_power_off_phy; > > > - } > > > - > > > - err = reset_control_deassert(rockchip->core_rst); > > > - if (err) { > > > - dev_err(dev, "deassert core_rst err %d\n", err); > > > - goto err_power_off_phy; > > > - } > > > - > > > - err = reset_control_deassert(rockchip->mgmt_rst); > > > - if (err) { > > > - dev_err(dev, "deassert mgmt_rst err %d\n", err); > > > - goto err_power_off_phy; > > > - } > > > - > > > - err = reset_control_deassert(rockchip->pipe_rst); > > > + err = reset_control_bulk_deassert(ROCKCHIP_NUM_CORE_RSTS, > > > + rockchip->core_rsts); > > > if (err) { > > > - dev_err(dev, "deassert pipe_rst err %d\n", err); > > > + dev_err(dev, "Couldn't deassert CORE %d\n", err); > ok, it shipped my review process. > > > goto err_power_off_phy; > > > } > > > > > > diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h > > > index bebab80c9553..cc667c73d42f 100644 > > > --- a/drivers/pci/controller/pcie-rockchip.h > > > +++ b/drivers/pci/controller/pcie-rockchip.h > > > @@ -15,6 +15,7 @@ > > > #include <linux/kernel.h> > > > #include <linux/pci.h> > > > #include <linux/pci-ecam.h> > > > +#include <linux/reset.h> > > > > > > /* > > > * The upper 16 bits of PCIE_CLIENT_CONFIG are a write mask for the lower 16 > > > @@ -288,18 +289,29 @@ > > > (((c) << ((b) * 8 + 5)) & \ > > > ROCKCHIP_PCIE_CORE_EP_FUNC_BAR_CFG_BAR_CTRL_MASK(b)) > > > > > > +#define ROCKCHIP_NUM_PM_RSTS ARRAY_SIZE(rockchip_pci_pm_rsts) > > > +#define ROCKCHIP_NUM_CORE_RSTS ARRAY_SIZE(rockchip_pci_core_rsts) > > > + > > > +static const char * const rockchip_pci_pm_rsts[] = { > > > + "pm", > > > + "pclk", > > > + "aclk", > > > +}; > > > + > > > +static const char * const rockchip_pci_core_rsts[] = { > > > + "mgmt-sticky", > > > + "core", > > > + "mgmt", > > > + "pipe", > > > +}; > > > + > > > struct rockchip_pcie { > > > void __iomem *reg_base; /* DT axi-base */ > > > void __iomem *apb_base; /* DT apb-base */ > > > bool legacy_phy; > > > struct phy *phys[MAX_LANE_NUM]; > > > - struct reset_control *core_rst; > > > - struct reset_control *mgmt_rst; > > > - struct reset_control *mgmt_sticky_rst; > > > - struct reset_control *pipe_rst; > > > - struct reset_control *pm_rst; > > > - struct reset_control *aclk_rst; > > > - struct reset_control *pclk_rst; > > > + struct reset_control_bulk_data pm_rsts[ROCKCHIP_NUM_PM_RSTS]; > > > + struct reset_control_bulk_data core_rsts[ROCKCHIP_NUM_CORE_RSTS]; > > > struct clk_bulk_data *clks; > > > int num_clks; > > > struct regulator *vpcie12v; /* 12V power supply */ > > > -- > > > 2.44.0 > > > > > > > -- > > மணிவண்ணன் சதாசிவம்
Hi On Thu, 17 Oct 2024 at 10:58, Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote: > > On Thu, Oct 17, 2024 at 09:17:35AM +0530, Anand Moon wrote: > > Hi Manivannan, > > > > On Wed, 16 Oct 2024 at 23:53, Manivannan Sadhasivam > > <manivannan.sadhasivam@linaro.org> wrote: > > > > > > On Wed, Oct 16, 2024 at 05:19:07PM +0530, Anand Moon wrote: > > > > Currently, the driver acquires and asserts/deasserts the resets > > > > individually thereby making the driver complex to read. But this > > > > can be simplified by using the reset_control_bulk APIs. > > > > Use devm_reset_control_bulk_get_exclusive() API to acquire all > > > > the resets and use reset_control_bulk_{assert/deassert}() APIs to > > > > assert/deassert them in bulk. > > > > > > > > Following the recommendations in 'Rockchip RK3399 TRM v1.3 Part2': > > > > > > > > 1. Split the reset controls into two groups as per section '17.5.8.1.1 PCIe > > > > as Root Complex'. > > > > > > > > 2. Deassert the 'Pipe, MGMT Sticky, MGMT, Core' resets in groups as per > > > > section '17.5.8.1.1 PCIe as Root Complex'. This is accomplished using the > > > > reset_control_bulk APIs. > > > > > > > > Signed-off-by: Anand Moon <linux.amoon@gmail.com> > > > > --- > > > > v9: Improved the commit message and try to fix few review comments. > > > > > > You haven't fixed all of them... Please take a look at all of my comments. > > > > It is becoming a nightmare for me, my confidence is a the lowest. > > Me too. It makes me go crazy if the trivial comments are not addressed in > multiple revisions and it results in waste of time for both of us. > I must apologize to you for my failure not being able to address this. I promise to tidy up from my end in the future. > > Can you fix this while applying or I will resend it with the fix? > > I don't merge the dwc patches, so I cannot do that. But what's preventing you > from addressing those comments. You cannot put the burden on the maintainers for > your mistake, sorry. > Ok I understand this will try to send in the next version > - Mani > Thanks -Anand
diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c index 2777ef0cb599..adf11208cc82 100644 --- a/drivers/pci/controller/pcie-rockchip.c +++ b/drivers/pci/controller/pcie-rockchip.c @@ -30,7 +30,7 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) struct platform_device *pdev = to_platform_device(dev); struct device_node *node = dev->of_node; struct resource *regs; - int err; + int err, i; if (rockchip->is_rc) { regs = platform_get_resource_byname(pdev, @@ -69,55 +69,23 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip) if (rockchip->link_gen < 0 || rockchip->link_gen > 2) rockchip->link_gen = 2; - rockchip->core_rst = devm_reset_control_get_exclusive(dev, "core"); - if (IS_ERR(rockchip->core_rst)) { - if (PTR_ERR(rockchip->core_rst) != -EPROBE_DEFER) - dev_err(dev, "missing core reset property in node\n"); - return PTR_ERR(rockchip->core_rst); - } - - rockchip->mgmt_rst = devm_reset_control_get_exclusive(dev, "mgmt"); - if (IS_ERR(rockchip->mgmt_rst)) { - if (PTR_ERR(rockchip->mgmt_rst) != -EPROBE_DEFER) - dev_err(dev, "missing mgmt reset property in node\n"); - return PTR_ERR(rockchip->mgmt_rst); - } - - rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev, - "mgmt-sticky"); - if (IS_ERR(rockchip->mgmt_sticky_rst)) { - if (PTR_ERR(rockchip->mgmt_sticky_rst) != -EPROBE_DEFER) - dev_err(dev, "missing mgmt-sticky reset property in node\n"); - return PTR_ERR(rockchip->mgmt_sticky_rst); - } - - rockchip->pipe_rst = devm_reset_control_get_exclusive(dev, "pipe"); - if (IS_ERR(rockchip->pipe_rst)) { - if (PTR_ERR(rockchip->pipe_rst) != -EPROBE_DEFER) - dev_err(dev, "missing pipe reset property in node\n"); - return PTR_ERR(rockchip->pipe_rst); - } + for (i = 0; i < ROCKCHIP_NUM_PM_RSTS; i++) + rockchip->pm_rsts[i].id = rockchip_pci_pm_rsts[i]; - rockchip->pm_rst = devm_reset_control_get_exclusive(dev, "pm"); - if (IS_ERR(rockchip->pm_rst)) { - if (PTR_ERR(rockchip->pm_rst) != -EPROBE_DEFER) - dev_err(dev, "missing pm reset property in node\n"); - return PTR_ERR(rockchip->pm_rst); - } + err = devm_reset_control_bulk_get_exclusive(dev, + ROCKCHIP_NUM_PM_RSTS, + rockchip->pm_rsts); + if (err) + return dev_err_probe(dev, err, "Cannot get the PM reset\n"); - rockchip->pclk_rst = devm_reset_control_get_exclusive(dev, "pclk"); - if (IS_ERR(rockchip->pclk_rst)) { - if (PTR_ERR(rockchip->pclk_rst) != -EPROBE_DEFER) - dev_err(dev, "missing pclk reset property in node\n"); - return PTR_ERR(rockchip->pclk_rst); - } + for (i = 0; i < ROCKCHIP_NUM_CORE_RSTS; i++) + rockchip->core_rsts[i].id = rockchip_pci_core_rsts[i]; - rockchip->aclk_rst = devm_reset_control_get_exclusive(dev, "aclk"); - if (IS_ERR(rockchip->aclk_rst)) { - if (PTR_ERR(rockchip->aclk_rst) != -EPROBE_DEFER) - dev_err(dev, "missing aclk reset property in node\n"); - return PTR_ERR(rockchip->aclk_rst); - } + err = devm_reset_control_bulk_get_exclusive(dev, + ROCKCHIP_NUM_CORE_RSTS, + rockchip->core_rsts); + if (err) + return dev_err_probe(dev, err, "Cannot get the CORE resets\n"); if (rockchip->is_rc) { rockchip->ep_gpio = devm_gpiod_get_optional(dev, "ep", @@ -147,23 +115,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) int err, i; u32 regs; - err = reset_control_assert(rockchip->aclk_rst); - if (err) { - dev_err(dev, "assert aclk_rst err %d\n", err); - return err; - } - - err = reset_control_assert(rockchip->pclk_rst); - if (err) { - dev_err(dev, "assert pclk_rst err %d\n", err); - return err; - } - - err = reset_control_assert(rockchip->pm_rst); - if (err) { - dev_err(dev, "assert pm_rst err %d\n", err); - return err; - } + err = reset_control_bulk_assert(ROCKCHIP_NUM_PM_RSTS, + rockchip->pm_rsts); + if (err) + return dev_err_probe(dev, err, "Couldn't assert PM resets\n"); for (i = 0; i < MAX_LANE_NUM; i++) { err = phy_init(rockchip->phys[i]); @@ -173,47 +128,17 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) } } - err = reset_control_assert(rockchip->core_rst); - if (err) { - dev_err(dev, "assert core_rst err %d\n", err); - goto err_exit_phy; - } - - err = reset_control_assert(rockchip->mgmt_rst); - if (err) { - dev_err(dev, "assert mgmt_rst err %d\n", err); - goto err_exit_phy; - } - - err = reset_control_assert(rockchip->mgmt_sticky_rst); - if (err) { - dev_err(dev, "assert mgmt_sticky_rst err %d\n", err); - goto err_exit_phy; - } - - err = reset_control_assert(rockchip->pipe_rst); - if (err) { - dev_err(dev, "assert pipe_rst err %d\n", err); - goto err_exit_phy; - } + err = reset_control_bulk_assert(ROCKCHIP_NUM_CORE_RSTS, + rockchip->core_rsts); + if (err) + return dev_err_probe(dev, err, "Couldn't assert Core resets\n"); udelay(10); - err = reset_control_deassert(rockchip->pm_rst); - if (err) { - dev_err(dev, "deassert pm_rst err %d\n", err); - goto err_exit_phy; - } - - err = reset_control_deassert(rockchip->aclk_rst); + err = reset_control_bulk_deassert(ROCKCHIP_NUM_PM_RSTS, + rockchip->pm_rsts); if (err) { - dev_err(dev, "deassert aclk_rst err %d\n", err); - goto err_exit_phy; - } - - err = reset_control_deassert(rockchip->pclk_rst); - if (err) { - dev_err(dev, "deassert pclk_rst err %d\n", err); + dev_err(dev, "Couldn't deassert PM resets %d\n", err); goto err_exit_phy; } @@ -252,31 +177,10 @@ int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) goto err_power_off_phy; } - /* - * Please don't reorder the deassert sequence of the following - * four reset pins. - */ - err = reset_control_deassert(rockchip->mgmt_sticky_rst); - if (err) { - dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); - goto err_power_off_phy; - } - - err = reset_control_deassert(rockchip->core_rst); - if (err) { - dev_err(dev, "deassert core_rst err %d\n", err); - goto err_power_off_phy; - } - - err = reset_control_deassert(rockchip->mgmt_rst); - if (err) { - dev_err(dev, "deassert mgmt_rst err %d\n", err); - goto err_power_off_phy; - } - - err = reset_control_deassert(rockchip->pipe_rst); + err = reset_control_bulk_deassert(ROCKCHIP_NUM_CORE_RSTS, + rockchip->core_rsts); if (err) { - dev_err(dev, "deassert pipe_rst err %d\n", err); + dev_err(dev, "Couldn't deassert CORE %d\n", err); goto err_power_off_phy; } diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index bebab80c9553..cc667c73d42f 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -15,6 +15,7 @@ #include <linux/kernel.h> #include <linux/pci.h> #include <linux/pci-ecam.h> +#include <linux/reset.h> /* * The upper 16 bits of PCIE_CLIENT_CONFIG are a write mask for the lower 16 @@ -288,18 +289,29 @@ (((c) << ((b) * 8 + 5)) & \ ROCKCHIP_PCIE_CORE_EP_FUNC_BAR_CFG_BAR_CTRL_MASK(b)) +#define ROCKCHIP_NUM_PM_RSTS ARRAY_SIZE(rockchip_pci_pm_rsts) +#define ROCKCHIP_NUM_CORE_RSTS ARRAY_SIZE(rockchip_pci_core_rsts) + +static const char * const rockchip_pci_pm_rsts[] = { + "pm", + "pclk", + "aclk", +}; + +static const char * const rockchip_pci_core_rsts[] = { + "mgmt-sticky", + "core", + "mgmt", + "pipe", +}; + struct rockchip_pcie { void __iomem *reg_base; /* DT axi-base */ void __iomem *apb_base; /* DT apb-base */ bool legacy_phy; struct phy *phys[MAX_LANE_NUM]; - struct reset_control *core_rst; - struct reset_control *mgmt_rst; - struct reset_control *mgmt_sticky_rst; - struct reset_control *pipe_rst; - struct reset_control *pm_rst; - struct reset_control *aclk_rst; - struct reset_control *pclk_rst; + struct reset_control_bulk_data pm_rsts[ROCKCHIP_NUM_PM_RSTS]; + struct reset_control_bulk_data core_rsts[ROCKCHIP_NUM_CORE_RSTS]; struct clk_bulk_data *clks; int num_clks; struct regulator *vpcie12v; /* 12V power supply */
Currently, the driver acquires and asserts/deasserts the resets individually thereby making the driver complex to read. But this can be simplified by using the reset_control_bulk APIs. Use devm_reset_control_bulk_get_exclusive() API to acquire all the resets and use reset_control_bulk_{assert/deassert}() APIs to assert/deassert them in bulk. Following the recommendations in 'Rockchip RK3399 TRM v1.3 Part2': 1. Split the reset controls into two groups as per section '17.5.8.1.1 PCIe as Root Complex'. 2. Deassert the 'Pipe, MGMT Sticky, MGMT, Core' resets in groups as per section '17.5.8.1.1 PCIe as Root Complex'. This is accomplished using the reset_control_bulk APIs. Signed-off-by: Anand Moon <linux.amoon@gmail.com> --- v9: Improved the commit message and try to fix few review comments. v8: I tried to address reviews and comments from Mani. Follow the sequence of De-assert as per the driver code. Drop the comment in the driver. Improve the commit message with the description of the TMP section. Improve the reason for the core functional changes in the commit description. Improve the error handling messages of the code. v7: replace devm_reset_control_bulk_get_optional_exclusive() with devm_reset_control_bulk_get_exclusive() update the functional changes. V6: Add reason for the split of the RESET pins. v5: Fix the De-assert reset core as per the TRM De-assert the PIPE_RESET_N/MGMT_STICKY_RESET_N/MGMT_RESET_N/RESET_N simultaneously. v4: use dev_err_probe in error path. v3: Fix typo in commit message, dropped reported by. v2: Fix compilation error reported by Intel test robot fixed checkpatch warning. --- drivers/pci/controller/pcie-rockchip.c | 154 +++++-------------------- drivers/pci/controller/pcie-rockchip.h | 26 +++-- 2 files changed, 48 insertions(+), 132 deletions(-)