| Message ID | 20241113091703.3133017-4-ben.dooks@codethink.co.uk (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [1/3] riscv: ptrace: add regs_set_register() | expand |
On Wed, Nov 13, 2024 at 09:17:03AM +0000, Ben Dooks wrote: > Add extraction for the func3 field of most instructions > for use with anyone who needs it. > > Note, added this for decoding of CSR accesses for > work we did looking at the RDCYCLE v RDTIME calls. > > Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> > --- > arch/riscv/include/asm/insn.h | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h > index 09fde95a5e8f..c67f44ff2066 100644 > --- a/arch/riscv/include/asm/insn.h > +++ b/arch/riscv/include/asm/insn.h > @@ -299,6 +299,10 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code) > ({typeof(x) x_ = (x); \ > (RV_X(x_, RVG_RD_OPOFF, RVG_RD_MASK)); }) > > +#define RV_EXTRACT_FUNCT3(x) \ > + ({typeof(x) x_ = (x); \ > + (RV_X(x_, RV_INSN_FUNCT3_OPOFF, RV_INSN_FUNCT3_MASK)); }) > + > #define RV_EXTRACT_UTYPE_IMM(x) \ > ({typeof(x) x_ = (x); \ > (RV_X(x_, RV_U_IMM_31_12_OPOFF, RV_U_IMM_31_12_MASK)); }) > -- > 2.37.2.352.g3c44437643 > It doesn't hurt to have an unused macro and there's a reasonable chance there will be a user someday, but I'd typically wait for a user before adding stuff. Anyway, Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Thanks, drew
On 13/11/2024 10:17, Andrew Jones wrote: > On Wed, Nov 13, 2024 at 09:17:03AM +0000, Ben Dooks wrote: >> Add extraction for the func3 field of most instructions >> for use with anyone who needs it. >> >> Note, added this for decoding of CSR accesses for >> work we did looking at the RDCYCLE v RDTIME calls. >> >> Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> >> --- >> arch/riscv/include/asm/insn.h | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h >> index 09fde95a5e8f..c67f44ff2066 100644 >> --- a/arch/riscv/include/asm/insn.h >> +++ b/arch/riscv/include/asm/insn.h >> @@ -299,6 +299,10 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code) >> ({typeof(x) x_ = (x); \ >> (RV_X(x_, RVG_RD_OPOFF, RVG_RD_MASK)); }) >> >> +#define RV_EXTRACT_FUNCT3(x) \ >> + ({typeof(x) x_ = (x); \ >> + (RV_X(x_, RV_INSN_FUNCT3_OPOFF, RV_INSN_FUNCT3_MASK)); }) >> + >> #define RV_EXTRACT_UTYPE_IMM(x) \ >> ({typeof(x) x_ = (x); \ >> (RV_X(x_, RV_U_IMM_31_12_OPOFF, RV_U_IMM_31_12_MASK)); }) >> -- >> 2.37.2.352.g3c44437643 >> > > It doesn't hurt to have an unused macro and there's a reasonable chance > there will be a user someday, but I'd typically wait for a user before > adding stuff. Anyway, > > Reviewed-by: Andrew Jones <ajones@ventanamicro.com> I am wondering if we add a check for RDCYCLE and print a warning even if we didn't try an fixup.
diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h index 09fde95a5e8f..c67f44ff2066 100644 --- a/arch/riscv/include/asm/insn.h +++ b/arch/riscv/include/asm/insn.h @@ -299,6 +299,10 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code) ({typeof(x) x_ = (x); \ (RV_X(x_, RVG_RD_OPOFF, RVG_RD_MASK)); }) +#define RV_EXTRACT_FUNCT3(x) \ + ({typeof(x) x_ = (x); \ + (RV_X(x_, RV_INSN_FUNCT3_OPOFF, RV_INSN_FUNCT3_MASK)); }) + #define RV_EXTRACT_UTYPE_IMM(x) \ ({typeof(x) x_ = (x); \ (RV_X(x_, RV_U_IMM_31_12_OPOFF, RV_U_IMM_31_12_MASK)); })
Add extraction for the func3 field of most instructions for use with anyone who needs it. Note, added this for decoding of CSR accesses for work we did looking at the RDCYCLE v RDTIME calls. Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> --- arch/riscv/include/asm/insn.h | 4 ++++ 1 file changed, 4 insertions(+)