Message ID | 8f857ba0d281010ddfb53d12b3dd66733ee6a810.1733726057.git.unicorn_wang@outlook.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | irqchip: Add Sophgo SG2042 MSI controller | expand |
On Mon, Dec 09, 2024 at 03:11:29PM +0800, Chen Wang wrote: > + msi-controller: true > + > + msi-ranges: > + maxItems: 1 > + > + sophgo,msi-doorbell-addr: > + description: > + u64 value of the MSI doorbell address > + $ref: /schemas/types.yaml#/definitions/uint64 reg, as asked last time. 'reg' does not mean you need to ioremap it. > + > +required: > + - compatible > + - reg > + - reg-names > + - msi-controller > + - msi-ranges > + - sophgo,msi-doorbell-addr > + > +additionalProperties: true Nope, this cannot be true. There is no single device binding like that, so do not introduce your own conventions. > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/irq.h> > + msi: msi-controller@30000000 { Drop unused label. Best regards, Krzysztof
On 2024/12/9 17:28, Krzysztof Kozlowski wrote: > On Mon, Dec 09, 2024 at 03:11:29PM +0800, Chen Wang wrote: >> + msi-controller: true >> + >> + msi-ranges: >> + maxItems: 1 >> + >> + sophgo,msi-doorbell-addr: >> + description: >> + u64 value of the MSI doorbell address >> + $ref: /schemas/types.yaml#/definitions/uint64 > reg, as asked last time. 'reg' does not mean you need to ioremap it. Ok, I will fix this in next version. >> + >> +required: >> + - compatible >> + - reg >> + - reg-names >> + - msi-controller >> + - msi-ranges >> + - sophgo,msi-doorbell-addr >> + >> +additionalProperties: true > Nope, this cannot be true. There is no single device binding like that, > so do not introduce your own conventions. Got, will fix it. > >> + >> +examples: >> + - | >> + #include <dt-bindings/interrupt-controller/irq.h> >> + msi: msi-controller@30000000 { > Drop unused label. Got, thanks. > > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml new file mode 100644 index 000000000000..0c9e9d07e5ae --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 MSI Controller + +maintainers: + - Chen Wang <unicorn_wang@outlook.com> + +description: + This interrupt controller is in Sophgo SG2042 for transforming interrupts from + PCIe MSI to PLIC interrupts. + +allOf: + - $ref: /schemas/interrupts.yaml# + - $ref: /schemas/interrupt-controller/msi-controller.yaml# + +properties: + compatible: + const: sophgo,sg2042-msi + + reg: + items: + - description: clear register + + reg-names: + items: + - const: clr + + msi-controller: true + + msi-ranges: + maxItems: 1 + + sophgo,msi-doorbell-addr: + description: + u64 value of the MSI doorbell address + $ref: /schemas/types.yaml#/definitions/uint64 + +required: + - compatible + - reg + - reg-names + - msi-controller + - msi-ranges + - sophgo,msi-doorbell-addr + +additionalProperties: true + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + msi: msi-controller@30000000 { + compatible = "sophgo,sg2042-msi"; + reg = <0x30000000 0x4>; + reg-names = "clr"; + msi-controller; + msi-ranges = <&plic 64 IRQ_TYPE_LEVEL_HIGH 32>; + sophgo,msi-doorbell-addr = <0x00000070 0x30010300>; + interrupt-parent = <&plic>; + };