diff mbox series

[v8,1/2] target/riscv: rvv: fix typo in vext continuous ldst function names

Message ID 20241218142353.1027938-2-craig.blackmore@embecosm.com (mailing list archive)
State New
Headers show
Series target/riscv: rvv: reduce the overhead for simple RISC-V vector unit-stride loads and stores | expand

Commit Message

Craig Blackmore Dec. 18, 2024, 2:23 p.m. UTC 
Replace `continus` with `continuous`.

Signed-off-by: Craig Blackmore <craig.blackmore@embecosm.com>
---
 target/riscv/vector_helper.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Daniel Henrique Barboza Dec. 18, 2024, 3:23 p.m. UTC | #1 
On 12/18/24 11:23 AM, Craig Blackmore wrote:
> Replace `continus` with `continuous`.
> 
> Signed-off-by: Craig Blackmore <craig.blackmore@embecosm.com>
> ---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   target/riscv/vector_helper.c | 10 +++++-----
>   1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index a85dd1d200..0f57e48cc5 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -195,7 +195,7 @@ GEN_VEXT_ST_ELEM(ste_w, uint32_t, H4, stl)
>   GEN_VEXT_ST_ELEM(ste_d, uint64_t, H8, stq)
>   
>   static inline QEMU_ALWAYS_INLINE void
> -vext_continus_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_tlb,
> +vext_continuous_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_tlb,
>                          void *vd, uint32_t evl, target_ulong addr,
>                          uint32_t reg_start, uintptr_t ra, uint32_t esz,
>                          bool is_load)
> @@ -207,7 +207,7 @@ vext_continus_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_tlb,
>   }
>   
>   static inline QEMU_ALWAYS_INLINE void
> -vext_continus_ldst_host(CPURISCVState *env, vext_ldst_elem_fn_host *ldst_host,
> +vext_continuous_ldst_host(CPURISCVState *env, vext_ldst_elem_fn_host *ldst_host,
>                           void *vd, uint32_t evl, uint32_t reg_start, void *host,
>                           uint32_t esz, bool is_load)
>   {
> @@ -342,8 +342,8 @@ vext_page_ldst_us(CPURISCVState *env, void *vd, target_ulong addr,
>   
>       if (flags == 0) {
>           if (nf == 1) {
> -            vext_continus_ldst_host(env, ldst_host, vd, evl, env->vstart, host,
> -                                    esz, is_load);
> +            vext_continuous_ldst_host(env, ldst_host, vd, evl, env->vstart,
> +                                      host, esz, is_load);
>           } else {
>               for (i = env->vstart; i < evl; ++i) {
>                   k = 0;
> @@ -357,7 +357,7 @@ vext_page_ldst_us(CPURISCVState *env, void *vd, target_ulong addr,
>           env->vstart += elems;
>       } else {
>           if (nf == 1) {
> -            vext_continus_ldst_tlb(env, ldst_tlb, vd, evl, addr, env->vstart,
> +            vext_continuous_ldst_tlb(env, ldst_tlb, vd, evl, addr, env->vstart,
>                                      ra, esz, is_load);
>           } else {
>               /* load bytes from guest memory */
Richard Henderson Dec. 18, 2024, 4:34 p.m. UTC | #2 
On 12/18/24 08:23, Craig Blackmore wrote:
> Replace `continus` with `continuous`.
> 
> Signed-off-by: Craig Blackmore<craig.blackmore@embecosm.com>
> ---
>   target/riscv/vector_helper.c | 10 +++++-----
>   1 file changed, 5 insertions(+), 5 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
Max Chou Dec. 18, 2024, 4:52 p.m. UTC | #3 
Reviewed-by: Max Chou <max.chou@sifive.com>

max


On 2024/12/18 10:23 PM, Craig Blackmore wrote:
> Replace `continus` with `continuous`.
>
> Signed-off-by: Craig Blackmore <craig.blackmore@embecosm.com>
> ---
>   target/riscv/vector_helper.c | 10 +++++-----
>   1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
> index a85dd1d200..0f57e48cc5 100644
> --- a/target/riscv/vector_helper.c
> +++ b/target/riscv/vector_helper.c
> @@ -195,7 +195,7 @@ GEN_VEXT_ST_ELEM(ste_w, uint32_t, H4, stl)
>   GEN_VEXT_ST_ELEM(ste_d, uint64_t, H8, stq)
>   
>   static inline QEMU_ALWAYS_INLINE void
> -vext_continus_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_tlb,
> +vext_continuous_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_tlb,
>                          void *vd, uint32_t evl, target_ulong addr,
>                          uint32_t reg_start, uintptr_t ra, uint32_t esz,
>                          bool is_load)
> @@ -207,7 +207,7 @@ vext_continus_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_tlb,
>   }
>   
>   static inline QEMU_ALWAYS_INLINE void
> -vext_continus_ldst_host(CPURISCVState *env, vext_ldst_elem_fn_host *ldst_host,
> +vext_continuous_ldst_host(CPURISCVState *env, vext_ldst_elem_fn_host *ldst_host,
>                           void *vd, uint32_t evl, uint32_t reg_start, void *host,
>                           uint32_t esz, bool is_load)
>   {
> @@ -342,8 +342,8 @@ vext_page_ldst_us(CPURISCVState *env, void *vd, target_ulong addr,
>   
>       if (flags == 0) {
>           if (nf == 1) {
> -            vext_continus_ldst_host(env, ldst_host, vd, evl, env->vstart, host,
> -                                    esz, is_load);
> +            vext_continuous_ldst_host(env, ldst_host, vd, evl, env->vstart,
> +                                      host, esz, is_load);
>           } else {
>               for (i = env->vstart; i < evl; ++i) {
>                   k = 0;
> @@ -357,7 +357,7 @@ vext_page_ldst_us(CPURISCVState *env, void *vd, target_ulong addr,
>           env->vstart += elems;
>       } else {
>           if (nf == 1) {
> -            vext_continus_ldst_tlb(env, ldst_tlb, vd, evl, addr, env->vstart,
> +            vext_continuous_ldst_tlb(env, ldst_tlb, vd, evl, addr, env->vstart,
>                                      ra, esz, is_load);
>           } else {
>               /* load bytes from guest memory */
diff mbox series

Patch

diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index a85dd1d200..0f57e48cc5 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -195,7 +195,7 @@  GEN_VEXT_ST_ELEM(ste_w, uint32_t, H4, stl)
 GEN_VEXT_ST_ELEM(ste_d, uint64_t, H8, stq)
 
 static inline QEMU_ALWAYS_INLINE void
-vext_continus_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_tlb,
+vext_continuous_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_tlb,
                        void *vd, uint32_t evl, target_ulong addr,
                        uint32_t reg_start, uintptr_t ra, uint32_t esz,
                        bool is_load)
@@ -207,7 +207,7 @@  vext_continus_ldst_tlb(CPURISCVState *env, vext_ldst_elem_fn_tlb *ldst_tlb,
 }
 
 static inline QEMU_ALWAYS_INLINE void
-vext_continus_ldst_host(CPURISCVState *env, vext_ldst_elem_fn_host *ldst_host,
+vext_continuous_ldst_host(CPURISCVState *env, vext_ldst_elem_fn_host *ldst_host,
                         void *vd, uint32_t evl, uint32_t reg_start, void *host,
                         uint32_t esz, bool is_load)
 {
@@ -342,8 +342,8 @@  vext_page_ldst_us(CPURISCVState *env, void *vd, target_ulong addr,
 
     if (flags == 0) {
         if (nf == 1) {
-            vext_continus_ldst_host(env, ldst_host, vd, evl, env->vstart, host,
-                                    esz, is_load);
+            vext_continuous_ldst_host(env, ldst_host, vd, evl, env->vstart,
+                                      host, esz, is_load);
         } else {
             for (i = env->vstart; i < evl; ++i) {
                 k = 0;
@@ -357,7 +357,7 @@  vext_page_ldst_us(CPURISCVState *env, void *vd, target_ulong addr,
         env->vstart += elems;
     } else {
         if (nf == 1) {
-            vext_continus_ldst_tlb(env, ldst_tlb, vd, evl, addr, env->vstart,
+            vext_continuous_ldst_tlb(env, ldst_tlb, vd, evl, addr, env->vstart,
                                    ra, esz, is_load);
         } else {
             /* load bytes from guest memory */