diff mbox series

[RFC,v2,12/19] dt-bindings: gpu: Add compatibles for T-HEAD TH1520 GPU

Message ID 20241223125553.3527812-13-m.wilczynski@samsung.com (mailing list archive)
State New
Headers show
Series [RFC,v2,01/19] dt-bindings: clock: Add VO subsystem clocks and update address requirements | expand

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Context Check Description
conchuod/vmtest-for-next-PR fail PR summary
conchuod/patch-12-test-1 success .github/scripts/patches/tests/build_rv32_defconfig.sh took 104.69s
conchuod/patch-12-test-2 success .github/scripts/patches/tests/build_rv64_clang_allmodconfig.sh took 978.07s
conchuod/patch-12-test-3 success .github/scripts/patches/tests/build_rv64_gcc_allmodconfig.sh took 1149.67s
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conchuod/patch-12-test-9 success .github/scripts/patches/tests/kdoc.sh took 0.44s
conchuod/patch-12-test-10 success .github/scripts/patches/tests/module_param.sh took 0.01s
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Commit Message

Michal Wilczynski Dec. 23, 2024, 12:55 p.m. UTC
Add a new SoC-specific compatible ("thead,th1520-gpu") for the T-HEAD
TH1520 GPU, alongside the Imagination BXM family compatible
("img,img-bxm").  This documents the GPU integration on the T-HEAD
platform.

Also adjust clock name constraints to accommodate a second clock named
"sys" instead of "mem" for T-HEAD. This is achieved by changing the
order, and making the 'sys' appear before 'mem'.

Provide example of the new GPU node.

Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
---
 .../bindings/gpu/img,powervr-rogue.yaml       | 32 +++++++++++++++++--
 1 file changed, 30 insertions(+), 2 deletions(-)

Comments

Krzysztof Kozlowski Dec. 23, 2024, 4:31 p.m. UTC | #1
On 23/12/2024 13:55, Michal Wilczynski wrote:
> Add a new SoC-specific compatible ("thead,th1520-gpu") for the T-HEAD
> TH1520 GPU, alongside the Imagination BXM family compatible
> ("img,img-bxm").  This documents the GPU integration on the T-HEAD
> platform.
> 
> Also adjust clock name constraints to accommodate a second clock named
> "sys" instead of "mem" for T-HEAD. This is achieved by changing the
> order, and making the 'sys' appear before 'mem'.
> 
> Provide example of the new GPU node.
> 
> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
> ---
>  .../bindings/gpu/img,powervr-rogue.yaml       | 32 +++++++++++++++++--
>  1 file changed, 30 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> index 4078cc816ea1..1eb1c15baec4 100644
> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> @@ -15,7 +15,10 @@ properties:
>      items:
>        - enum:
>            - ti,am62-gpu
> -      - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable
> +          - thead,th1520-gpu
> +      - enum:
> +          - img,img-axe # IMG AXE GPU model/revision is fully discoverable
> +          - img,img-bxm

This cannot be flexible. You now changed am62-gpu. Look how other
bindings do it: oneOf with two lists.
>  
>    reg:
>      maxItems: 1
> @@ -27,8 +30,8 @@ properties:
>    clock-names:
>      items:
>        - const: core
> -      - const: mem
>        - const: sys
> +      - const: mem

That's ABI break, so no.

Widest constraints - min/maxItems - stay here. In allOf:if:then you
specify the list of items. See:
https://elixir.bootlin.com/linux/v6.11-rc6/source/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml#L127

You will need to adjust existing variants - list the items there.

>      minItems: 1
>  
Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
index 4078cc816ea1..1eb1c15baec4 100644
--- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
+++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
@@ -15,7 +15,10 @@  properties:
     items:
       - enum:
           - ti,am62-gpu
-      - const: img,img-axe # IMG AXE GPU model/revision is fully discoverable
+          - thead,th1520-gpu
+      - enum:
+          - img,img-axe # IMG AXE GPU model/revision is fully discoverable
+          - img,img-bxm
 
   reg:
     maxItems: 1
@@ -27,8 +30,8 @@  properties:
   clock-names:
     items:
       - const: core
-      - const: mem
       - const: sys
+      - const: mem
     minItems: 1
 
   interrupts:
@@ -62,6 +65,15 @@  allOf:
       properties:
         clocks:
           maxItems: 1
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: thead,th1520-gpu
+    then:
+      properties:
+        clocks:
+          maxItems: 2
 
 examples:
   - |
@@ -77,3 +89,19 @@  examples:
         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
         power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
     };
+
+    #include <dt-bindings/reset/thead,th1520-reset.h>
+    #include <dt-bindings/clock/thead,th1520-clk-ap.h>
+    #include <dt-bindings/power/thead,th1520-power.h>
+
+    gpu: gpu@fff0000 {
+        compatible = "thead,th1520-gpu", "img,img-bxm";
+        reg = <0xfff0000 0x1000>;
+        interrupt-parent = <&plic>;
+        interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&clk CLK_GPU_CORE>, <&clk CLK_GPU_CFG_ACLK>;
+        clock-names = "core", "sys";
+        power-domains = <&pd TH1520_AON_GPU_PD>;
+        resets = <&rst TH1520_RESET_ID_GPU>;
+        reset-names = "gpu";
+    };