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[v5,0/7] Check Scaler and DSC Prefill Latency Against Vblank

Message ID 20250115151714.3665211-1-mitulkumar.ajitkumar.golani@intel.com (mailing list archive)
Headers show
Series Check Scaler and DSC Prefill Latency Against Vblank | expand

Message

Golani, Mitulkumar Ajitkumar Jan. 15, 2025, 3:17 p.m. UTC 
Compute and check if dsc and scaler prefill latency is sufficient with
respect to vblank.

Previous Revision Reference:
https://patchwork.freedesktop.org/series/141203/
https://patchwork.freedesktop.org/series/142745/

Mitul Golani (7):
  drm/i915/scaler: Add and compute scaling factors
  drm/i915/scaler: Use crtc_state to setup plane or pipe scaler
  drm/i915/scaler: Refactor max_scale computation
  drm/i915/scaler: Compute scaling factors for pipe scaler
  drm/i915/scaler: Limit pipe scaler downscaling factors for YUV420
  drm/i915/scaler: Check if vblank is sufficient for scaler
  drm/i915/dsc: Check if vblank is sufficient for dsc prefill

 .../drm/i915/display/intel_display_types.h    |   2 +
 drivers/gpu/drm/i915/display/skl_scaler.c     | 123 ++++++++++++------
 drivers/gpu/drm/i915/display/skl_watermark.c  |  84 +++++++++++-
 3 files changed, 171 insertions(+), 38 deletions(-)

Comments

Golani, Mitulkumar Ajitkumar Jan. 15, 2025, 3:59 p.m. UTC | #1 
Hi,

In regards to patches sent to over wrong mailing list id which is  " v5-000intel-xe@lists.freedesktop.org ". Seems like some prefix got added while sending it to intel-xe mailing list. That's why sent correctly to intel-gfx but mail delivery failed for intel-xe. I will float the revision again if there are any pending comments on current patch series, or I will refloat on both intel-gfx and intel-xe,  which ever works best. 

Suggestion will be helpful to correct this.

Regards,
Mitul

> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Mitul
> Golani
> Sent: 15 January 2025 20:47
> To: intel-gfx@lists.freedesktop.org; v5-000intel-xe@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>; Syrjala, Ville <ville.syrjala@intel.com>
> Subject: [PATCH v5 0/7] Check Scaler and DSC Prefill Latency Against Vblank
> 
> Compute and check if dsc and scaler prefill latency is sufficient with respect
> to vblank.
> 
> Previous Revision Reference:
> https://patchwork.freedesktop.org/series/141203/
> https://patchwork.freedesktop.org/series/142745/
> 
> Mitul Golani (7):
>   drm/i915/scaler: Add and compute scaling factors
>   drm/i915/scaler: Use crtc_state to setup plane or pipe scaler
>   drm/i915/scaler: Refactor max_scale computation
>   drm/i915/scaler: Compute scaling factors for pipe scaler
>   drm/i915/scaler: Limit pipe scaler downscaling factors for YUV420
>   drm/i915/scaler: Check if vblank is sufficient for scaler
>   drm/i915/dsc: Check if vblank is sufficient for dsc prefill
> 
>  .../drm/i915/display/intel_display_types.h    |   2 +
>  drivers/gpu/drm/i915/display/skl_scaler.c     | 123 ++++++++++++------
>  drivers/gpu/drm/i915/display/skl_watermark.c  |  84 +++++++++++-
>  3 files changed, 171 insertions(+), 38 deletions(-)
> 
> --
> 2.48.0