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riscv: Simplify base extension checks and direct boolean return

Message ID 20250129203843.1136838-1-yikming2222@gmail.com (mailing list archive)
State New
Headers show
Series riscv: Simplify base extension checks and direct boolean return | expand

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Commit Message

Chin Yik Ming Jan. 29, 2025, 8:38 p.m. UTC
Reduce three lines checking to single line using a ternary conditional
expression for getting the base extension word. In addition, the
test_bit macro function already return a boolean which matches the
return type of the caller, so directly return the result of the test_bit
macro function.

Signed-off-by: Chin Yik Ming <yikming2222@gmail.com>
---
 arch/riscv/kernel/cpufeature.c        | 6 ++----
 arch/riscv/kernel/vendor_extensions.c | 2 +-
 2 files changed, 3 insertions(+), 5 deletions(-)

Comments

Andrew Jones Jan. 30, 2025, 8:50 a.m. UTC | #1
On Thu, Jan 30, 2025 at 04:38:43AM +0800, Chin Yik Ming wrote:
> Reduce three lines checking to single line using a ternary conditional
> expression for getting the base extension word. In addition, the
> test_bit macro function already return a boolean which matches the
> return type of the caller, so directly return the result of the test_bit
> macro function.
> 
> Signed-off-by: Chin Yik Ming <yikming2222@gmail.com>
> ---
>  arch/riscv/kernel/cpufeature.c        | 6 ++----
>  arch/riscv/kernel/vendor_extensions.c | 2 +-
>  2 files changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index c0916ed318c2..32525b69ab99 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -49,9 +49,7 @@ struct riscv_isainfo hart_isa[NR_CPUS];
>   */
>  unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap)
>  {
> -	if (!isa_bitmap)
> -		return riscv_isa[0];
> -	return isa_bitmap[0];
> +	return !isa_bitmap ? riscv_isa[0] : isa_bitmap[0];
>  }
>  EXPORT_SYMBOL_GPL(riscv_isa_extension_base);
>  
> @@ -72,7 +70,7 @@ bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned i
>  	if (bit >= RISCV_ISA_EXT_MAX)
>  		return false;
>  
> -	return test_bit(bit, bmap) ? true : false;
> +	return test_bit(bit, bmap);
>  }
>  EXPORT_SYMBOL_GPL(__riscv_isa_extension_available);
>  
> diff --git a/arch/riscv/kernel/vendor_extensions.c b/arch/riscv/kernel/vendor_extensions.c
> index a8126d118341..62f55bc779e9 100644
> --- a/arch/riscv/kernel/vendor_extensions.c
> +++ b/arch/riscv/kernel/vendor_extensions.c
> @@ -51,6 +51,6 @@ bool __riscv_isa_vendor_extension_available(int cpu, unsigned long vendor, unsig
>  	if (bit >= RISCV_ISA_VENDOR_EXT_MAX)
>  		return false;
>  
> -	return test_bit(bit, bmap->isa) ? true : false;
> +	return test_bit(bit, bmap->isa);
>  }
>  EXPORT_SYMBOL_GPL(__riscv_isa_vendor_extension_available);
> -- 
> 2.34.1
>

Since the changes are harmless and I do prefer the way the code looks
with them,

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>

but these types of changes are pretty much just pointless churn...

Thanks,
drew
diff mbox series

Patch

diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index c0916ed318c2..32525b69ab99 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -49,9 +49,7 @@  struct riscv_isainfo hart_isa[NR_CPUS];
  */
 unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap)
 {
-	if (!isa_bitmap)
-		return riscv_isa[0];
-	return isa_bitmap[0];
+	return !isa_bitmap ? riscv_isa[0] : isa_bitmap[0];
 }
 EXPORT_SYMBOL_GPL(riscv_isa_extension_base);
 
@@ -72,7 +70,7 @@  bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, unsigned i
 	if (bit >= RISCV_ISA_EXT_MAX)
 		return false;
 
-	return test_bit(bit, bmap) ? true : false;
+	return test_bit(bit, bmap);
 }
 EXPORT_SYMBOL_GPL(__riscv_isa_extension_available);
 
diff --git a/arch/riscv/kernel/vendor_extensions.c b/arch/riscv/kernel/vendor_extensions.c
index a8126d118341..62f55bc779e9 100644
--- a/arch/riscv/kernel/vendor_extensions.c
+++ b/arch/riscv/kernel/vendor_extensions.c
@@ -51,6 +51,6 @@  bool __riscv_isa_vendor_extension_available(int cpu, unsigned long vendor, unsig
 	if (bit >= RISCV_ISA_VENDOR_EXT_MAX)
 		return false;
 
-	return test_bit(bit, bmap->isa) ? true : false;
+	return test_bit(bit, bmap->isa);
 }
 EXPORT_SYMBOL_GPL(__riscv_isa_vendor_extension_available);