| Message ID | 20250321151831.623575-8-elder@riscstar.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | clk: spacemit: add K1 reset support | expand |
| Context | Check | Description |
|---|---|---|
| bjorn/pre-ci_am | fail | Failed to apply series |
On 10:18 Fri 21 Mar , Alex Elder wrote: > Define syscon nodes for the RCPU, RCPU2, and APBC2 SpacemiT CCUS, which > currently support resets but not clocks in the SpacemiT K1. > > Signed-off-by: Alex Elder <elder@riscstar.com> > --- > arch/riscv/boot/dts/spacemit/k1.dtsi | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi > index 09a9100986b19..f86d1b58c6d35 100644 > --- a/arch/riscv/boot/dts/spacemit/k1.dtsi > +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi > @@ -350,6 +350,18 @@ soc { > dma-noncoherent; > ranges; > > + syscon_rcpu: system-controller@c0880000 { I'm not sure if syscon_rcpu is good name to go, it's AUDIO Peripherals in docs, see 7.2 Main CPU Domain Address Mapping https://developer.spacemit.com/documentation?token=LzJyw97BCipK1dkUygrcbT0NnMg > + compatible = "spacemit,k1-syscon-rcpu"; > + reg = <0x0 0xc0880000 0x0 0x2048>; > + #reset-cells = <1>; > + }; > + > + syscon_rcpu2: system-controller@c0888000 { not found this address mapping in above docs link > + compatible = "spacemit,k1-syscon-rcpu2"; > + reg = <0x0 0xc0888000 0x0 0x28>; > + #reset-cells = <1>; > + }; > + > syscon_apbc: system-control@d4015000 { > compatible = "spacemit,k1-syscon-apbc"; > reg = <0x0 0xd4015000 0x0 0x1000>; > @@ -518,6 +530,12 @@ clint: timer@e4000000 { > <&cpu7_intc 3>, <&cpu7_intc 7>; > }; > > + syscon_apbc2: system-controller@f0610000 { > + compatible = "spacemit,k1-syscon-apbc2"; > + reg = <0x0 0xf0610000 0x0 0x20>; > + #reset-cells = <1>; > + }; > + > sec_uart1: serial@f0612000 { > compatible = "spacemit,k1-uart", "intel,xscale-uart"; > reg = <0x0 0xf0612000 0x0 0x100>; > -- > 2.43.0 >
On 3/22/25 11:48 AM, Yixun Lan wrote: > On 10:18 Fri 21 Mar , Alex Elder wrote: >> Define syscon nodes for the RCPU, RCPU2, and APBC2 SpacemiT CCUS, which >> currently support resets but not clocks in the SpacemiT K1. >> >> Signed-off-by: Alex Elder <elder@riscstar.com> >> --- >> arch/riscv/boot/dts/spacemit/k1.dtsi | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi >> index 09a9100986b19..f86d1b58c6d35 100644 >> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi >> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi >> @@ -350,6 +350,18 @@ soc { >> dma-noncoherent; >> ranges; >> >> + syscon_rcpu: system-controller@c0880000 { > I'm not sure if syscon_rcpu is good name to go, it's AUDIO Peripherals > in docs, see > > 7.2 Main CPU Domain Address Mapping > https://developer.spacemit.com/documentation?token=LzJyw97BCipK1dkUygrcbT0NnMg They call it "AUD_MCUSYSCTRL section <RCPU(0xC0880000)>", where the registers layouts are defined, and the register names use the "RCPU" prefix by convention. I guess I could use "AUDIO" instead, but I think it's "RCPU" is a little better because of the way things in the region are named. It's a little like how "pll" is used for the DT node name for things in the "APBS" region. I don't really like that, because the connection between the two isn't very clear. >> + compatible = "spacemit,k1-syscon-rcpu"; >> + reg = <0x0 0xc0880000 0x0 0x2048>; >> + #reset-cells = <1>; >> + }; >> + >> + syscon_rcpu2: system-controller@c0888000 { > not found this address mapping in above docs link You're right. I was following what the downstream code did. I'll gladly just include this in the main "RCPU" node. Thank you very much for the review Yixun. -Alex >> + compatible = "spacemit,k1-syscon-rcpu2"; >> + reg = <0x0 0xc0888000 0x0 0x28>; >> + #reset-cells = <1>; >> + }; >> + >> syscon_apbc: system-control@d4015000 { >> compatible = "spacemit,k1-syscon-apbc"; >> reg = <0x0 0xd4015000 0x0 0x1000>; >> @@ -518,6 +530,12 @@ clint: timer@e4000000 { >> <&cpu7_intc 3>, <&cpu7_intc 7>; >> }; >> >> + syscon_apbc2: system-controller@f0610000 { >> + compatible = "spacemit,k1-syscon-apbc2"; >> + reg = <0x0 0xf0610000 0x0 0x20>; >> + #reset-cells = <1>; >> + }; >> + >> sec_uart1: serial@f0612000 { >> compatible = "spacemit,k1-uart", "intel,xscale-uart"; >> reg = <0x0 0xf0612000 0x0 0x100>; >> -- >> 2.43.0 >> >
Hi Alex: On 08:23 Sun 23 Mar , Alex Elder wrote: > On 3/22/25 11:48 AM, Yixun Lan wrote: > > On 10:18 Fri 21 Mar , Alex Elder wrote: > >> Define syscon nodes for the RCPU, RCPU2, and APBC2 SpacemiT CCUS, which > >> currently support resets but not clocks in the SpacemiT K1. > >> > >> Signed-off-by: Alex Elder <elder@riscstar.com> > >> --- > >> arch/riscv/boot/dts/spacemit/k1.dtsi | 18 ++++++++++++++++++ > >> 1 file changed, 18 insertions(+) > >> > >> diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi > >> index 09a9100986b19..f86d1b58c6d35 100644 > >> --- a/arch/riscv/boot/dts/spacemit/k1.dtsi > >> +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi > >> @@ -350,6 +350,18 @@ soc { > >> dma-noncoherent; > >> ranges; > >> > >> + syscon_rcpu: system-controller@c0880000 { > > I'm not sure if syscon_rcpu is good name to go, it's AUDIO Peripherals > > in docs, see > > > > 7.2 Main CPU Domain Address Mapping > > https://developer.spacemit.com/documentation?token=LzJyw97BCipK1dkUygrcbT0NnMg > > They call it "AUD_MCUSYSCTRL section <RCPU(0xC0880000)>", > where the registers layouts are defined, and the register > names use the "RCPU" prefix by convention. > > I guess I could use "AUDIO" instead, but I think it's > "RCPU" is a little better because of the way things in > the region are named. It's a little like how "pll" is > used for the DT node name for things in the "APBS" region. > I don't really like that, because the connection between > the two isn't very clear. > ok, by whatever you choose, I'd be fine in case you go with RCPU, can you put a comment above? explain there is slightly a devergence with docs from SpacemiT's web also I noticed the io size you written here is smaller than described in docs which I think usually it's fine (docs may give larger number - 0x80000) just make sure you checked? so all real io region will be covered, same for rcpu2 > >> + compatible = "spacemit,k1-syscon-rcpu"; > >> + reg = <0x0 0xc0880000 0x0 0x2048>; > >> + #reset-cells = <1>; > >> + }; > >> + > >> + syscon_rcpu2: system-controller@c0888000 { > > not found this address mapping in above docs link > > You're right. I was following what the downstream code did. > I'll gladly just include this in the main "RCPU" node. > > Thank you very much for the review Yixun. > > -Alex > > >> + compatible = "spacemit,k1-syscon-rcpu2"; > >> + reg = <0x0 0xc0888000 0x0 0x28>; > >> + #reset-cells = <1>; > >> + }; > >> + > >> syscon_apbc: system-control@d4015000 { > >> compatible = "spacemit,k1-syscon-apbc"; > >> reg = <0x0 0xd4015000 0x0 0x1000>; > >> @@ -518,6 +530,12 @@ clint: timer@e4000000 { > >> <&cpu7_intc 3>, <&cpu7_intc 7>; > >> }; > >> > >> + syscon_apbc2: system-controller@f0610000 { > >> + compatible = "spacemit,k1-syscon-apbc2"; > >> + reg = <0x0 0xf0610000 0x0 0x20>; > >> + #reset-cells = <1>; > >> + }; > >> + > >> sec_uart1: serial@f0612000 { > >> compatible = "spacemit,k1-uart", "intel,xscale-uart"; > >> reg = <0x0 0xf0612000 0x0 0x100>; > >> -- > >> 2.43.0 > >> > > > >
diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi index 09a9100986b19..f86d1b58c6d35 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -350,6 +350,18 @@ soc { dma-noncoherent; ranges; + syscon_rcpu: system-controller@c0880000 { + compatible = "spacemit,k1-syscon-rcpu"; + reg = <0x0 0xc0880000 0x0 0x2048>; + #reset-cells = <1>; + }; + + syscon_rcpu2: system-controller@c0888000 { + compatible = "spacemit,k1-syscon-rcpu2"; + reg = <0x0 0xc0888000 0x0 0x28>; + #reset-cells = <1>; + }; + syscon_apbc: system-control@d4015000 { compatible = "spacemit,k1-syscon-apbc"; reg = <0x0 0xd4015000 0x0 0x1000>; @@ -518,6 +530,12 @@ clint: timer@e4000000 { <&cpu7_intc 3>, <&cpu7_intc 7>; }; + syscon_apbc2: system-controller@f0610000 { + compatible = "spacemit,k1-syscon-apbc2"; + reg = <0x0 0xf0610000 0x0 0x20>; + #reset-cells = <1>; + }; + sec_uart1: serial@f0612000 { compatible = "spacemit,k1-uart", "intel,xscale-uart"; reg = <0x0 0xf0612000 0x0 0x100>;
Define syscon nodes for the RCPU, RCPU2, and APBC2 SpacemiT CCUS, which currently support resets but not clocks in the SpacemiT K1. Signed-off-by: Alex Elder <elder@riscstar.com> --- arch/riscv/boot/dts/spacemit/k1.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)