| Message ID | 20120821203336.GA5086@growl (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Aug 21, 2012 at 4:33 PM, Luca Tettamanti <kronos.it@gmail.com> wrote: > On Tue, Aug 21, 2012 at 09:51:46AM -0400, Alex Deucher wrote: >> On Mon, Aug 20, 2012 at 3:30 PM, Luca Tettamanti <kronos.it@gmail.com> wrote: >> > Any printk between evergreen_mc_stop and evergreen_mc_resume locks up >> > the machine. The likely culprit is commit 023e188e: >> >> yeah, vram is locked out at that point. I guess we probably need to >> block anyone from trying to access it. > > I see; the 2 dev_warn would probably lock up the machine as well right? > >> > I haven't tried backing out the commit yet, but looking at the diff I >> > see that you call radeon_wait_for_vblank and radeon_get_vblank_counter, >> > but evergreen_mc_program is called way before IRQ is set up. Is the >> > vblank counter running? Looks like we just hitting the timeout here... >> >> We aren't waiting for an interrupt, just polling the current crtc >> status until it enters the vblank region. The status and counters >> should be working as we only wait on displays that are enabled. > > It appears that all the crtcs are considered active: > > [ 4.260766] crtc 0 enabled 272696081 (this is the value of crtc_enabled) > [ 4.260766] crtc 0 wait for vblank 0x1 (0x1 means no timeout) > [ 4.260766] crtc 0: waited 33 [100000] (number of loops of radeon_get_vblank_counter) > [ 4.260766] crtc 1 enabled 272630544 > [ 4.260766] crtc 1 wait for vblank 0x1 > [ 4.260766] crtc 1: waited 100000 [100000] > [ 4.260766] crtc 2 enabled 4195088 > [ 4.260766] crtc 2 wait for vblank 0x1 > [ 4.260766] crtc 2: waited 100000 [100000] > [ 4.260766] crtc 3 enabled 4195088 > [ 4.260766] crtc 3 wait for vblank 0x1 > [ 4.260766] crtc 3: waited 100000 [100000] > [ 4.260766] crtc 4 enabled 4195088 > [ 4.260766] crtc 4 wait for vblank 0x1 > [ 4.260766] crtc 4: waited 100000 [100000] > [ 4.260766] crtc 5 enabled 4195088 > [ 4.260766] crtc 5 wait for vblank 0x1 > [ 4.260766] crtc 5: waited 100000 [100000] > > Maybe the code should be checking EVERGREEN_CRTC_MASTER_EN? > > I'm testing this patch and the boot is fast again: Yes, that's correct. I'll fix that up. Alex > > diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c > index 2308c7d..72bf721 100644 > --- a/drivers/gpu/drm/radeon/evergreen.c > +++ b/drivers/gpu/drm/radeon/evergreen.c > @@ -1251,7 +1251,8 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav > WREG32(VGA_RENDER_CONTROL, 0); > /* blank the display controllers */ > for (i = 0; i < rdev->num_crtc; i++) { > - crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]); > + crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) & > + EVERGREEN_CRTC_MASTER_EN; > if (crtc_enabled) { > save->crtc_enabled[i] = true; > if (ASIC_IS_DCE6(rdev)) { > > > Luca
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 2308c7d..72bf721 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1251,7 +1251,8 @@ void evergreen_mc_stop(struct radeon_device *rdev, struct evergreen_mc_save *sav WREG32(VGA_RENDER_CONTROL, 0); /* blank the display controllers */ for (i = 0; i < rdev->num_crtc; i++) { - crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]); + crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) & + EVERGREEN_CRTC_MASTER_EN; if (crtc_enabled) { save->crtc_enabled[i] = true; if (ASIC_IS_DCE6(rdev)) {