@@ -205,7 +205,7 @@ static int rt2500pci_rfkill_poll(struct rt2x00_dev *rt2x00dev)
u32 reg;
rt2x00pci_register_read(rt2x00dev, GPIOCSR, ®);
- return rt2x00_get_field32(reg, GPIOCSR_BIT0);
+ return rt2x00_get_field32(reg, GPIOCSR_VAL0);
}
#ifdef CONFIG_RT2X00_LIB_LEDS
@@ -789,16 +789,18 @@
/*
* GPIOCSR: GPIO control register.
+ * GPIOCSR_VALx: GPIO value
+ * GPIOCSR_DIRx: GPIO direction: 0 = output; 1 = input
*/
#define GPIOCSR 0x0120
-#define GPIOCSR_BIT0 FIELD32(0x00000001)
-#define GPIOCSR_BIT1 FIELD32(0x00000002)
-#define GPIOCSR_BIT2 FIELD32(0x00000004)
-#define GPIOCSR_BIT3 FIELD32(0x00000008)
-#define GPIOCSR_BIT4 FIELD32(0x00000010)
-#define GPIOCSR_BIT5 FIELD32(0x00000020)
-#define GPIOCSR_BIT6 FIELD32(0x00000040)
-#define GPIOCSR_BIT7 FIELD32(0x00000080)
+#define GPIOCSR_VAL0 FIELD32(0x00000001)
+#define GPIOCSR_VAL1 FIELD32(0x00000002)
+#define GPIOCSR_VAL2 FIELD32(0x00000004)
+#define GPIOCSR_VAL3 FIELD32(0x00000008)
+#define GPIOCSR_VAL4 FIELD32(0x00000010)
+#define GPIOCSR_VAL5 FIELD32(0x00000020)
+#define GPIOCSR_VAL6 FIELD32(0x00000040)
+#define GPIOCSR_VAL7 FIELD32(0x00000080)
#define GPIOCSR_DIR0 FIELD32(0x00000100)
#define GPIOCSR_DIR1 FIELD32(0x00000200)
#define GPIOCSR_DIR2 FIELD32(0x00000400)
Rename GPIOCSR_BIT<x> to GPIOCSR_VAL<x> to represent the actual meaning better. Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com> Cc: <stable@vger.kernel.org>