diff mbox

[2/2] drm/i915: optimize the shmem_pwrite slowpath handling

Message ID 1352990406-3039-2-git-send-email-daniel.vetter@ffwll.ch (mailing list archive)
State New, archived
Headers show

Commit Message

Daniel Vetter Nov. 15, 2012, 2:40 p.m. UTC
Since we drop dev->struct_mutex when going through the slowpath, the
object might have been moved out of the cpu domain. Hence we need to
clflush the entire object to ensure that after the ioctl returns,
everything is coherent again (interwoven writes are ill-defined
anyway).

But we only need to do this if we start in the cpu domain and the
object requires flushing for coherency. So don't do the flushing if
the object is coherent anyway or if we've done in-line clfushing
already.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/i915_gem.c |    5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

Chris Wilson Nov. 15, 2012, 3 p.m. UTC | #1
On Thu, 15 Nov 2012 15:40:06 +0100, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> Since we drop dev->struct_mutex when going through the slowpath, the
> object might have been moved out of the cpu domain. Hence we need to
> clflush the entire object to ensure that after the ioctl returns,
> everything is coherent again (interwoven writes are ill-defined
> anyway).
> 
> But we only need to do this if we start in the cpu domain and the
> object requires flushing for coherency. So don't do the flushing if
> the object is coherent anyway or if we've done in-line clfushing
> already.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

> ---
>  drivers/gpu/drm/i915/i915_gem.c |    5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index eaaf095..feb0b0c 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -831,8 +831,9 @@ out:
>  
>  	if (hit_slowpath) {
>  		/* Fixup: Flush dirty cachelines in case the object isn't in the
> -		 * cpu write domain anymore. */
> -		if (obj->base.write_domain != I915_GEM_DOMAIN_CPU) {
> +		 * cpu write domain anymore, and we haven't flushed it manually. */
> +		if (obj->base.write_domain != I915_GEM_DOMAIN_CPU &&
> +		    !needs_clflush_after && obj->cache_level == I915_CACHE_NONE) {
>  			i915_gem_clflush_object(obj);
>  			i915_gem_chipset_flush(dev);
>  		}
> -- 
> 1.7.10.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
From: Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: simplify shmem pwrite/pread slowpath handling
To: Daniel Vetter <daniel.vetter@ffwll.ch>, Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
In-Reply-To: <1352990406-3039-1-git-send-email-daniel.vetter@ffwll.ch>
References: <1352990406-3039-1-git-send-email-daniel.vetter@ffwll.ch>

On Thu, 15 Nov 2012 15:40:05 +0100, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> The shmem paths for pwrite/pread used a clever trick to hold onto a
> single page when dropping the big dev->struct_mutex for the slowpath.
> But this ran the risk of reinstating (or not completely purging) the
> backing storage when dropping purgeable objects.
> 
> Hence the code needed to keep track of whether it ever dropped the
> lock, and if it did, manually check whether it needs to re-purge the
> backing storage. But thanks to the pages pin count introduced in
> 
> commit a5570178c059cec59e9835be20bc8546377fa7b5
> Author: Chris Wilson <chris@chris-wilson.co.uk>
> Date:   Tue Sep 4 21:02:54 2012 +0100
> 
>     drm/i915: Pin backing pages whilst exporting through a dmabuf vmap
> 
> which allowed us to pin the backing storage and remove that page
> reference trick from shmem_pwrite/read in
> 
> commit f60d7f0c1d55a935475ab394955cafddefaa6533
> Author: Chris Wilson <chris@chris-wilson.co.uk>
> Date:   Tue Sep 4 21:02:56 2012 +0100
> 
>     drm/i915: Pin backing pages for pread
> 
> and
> 
> commit 755d22184f1e5015b040acee794542d9cf8a16c5
> Author: Chris Wilson <chris@chris-wilson.co.uk>
> Date:   Tue Sep 4 21:02:55 2012 +0100
> 
>     drm/i915: Pin backing pages for pwrite
> 
> we can now abolish this check. The slowpath cleanup completely
> disappears from pread, and for pwrite we're only left with the domain
> fixup in case someone moved the object out of the cpu domain from
> under us. A follow-on patch will optimize that a notch more.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

I approve of such removal of scary code, and indeed with the pinned
pages not disappearing beneath us we can forgo the truncate. (In fact it
*should* be redundant under such circumstances as the pages_unpin should
also call it.) The only problem that then remains is that we do not
document/prevent calling truncate on the shmem filp whilst the pages are
pinned. That's not possible with today's code, but we should clarify the
rule that truncate should only be called with obj->pages == NULL.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
Chris Wilson Nov. 15, 2012, 3:02 p.m. UTC | #2
On Thu, 15 Nov 2012 15:40:06 +0100, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> Since we drop dev->struct_mutex when going through the slowpath, the
> object might have been moved out of the cpu domain. Hence we need to
> clflush the entire object to ensure that after the ioctl returns,
> everything is coherent again (interwoven writes are ill-defined
> anyway).
> 
> But we only need to do this if we start in the cpu domain and the
> object requires flushing for coherency. So don't do the flushing if
> the object is coherent anyway or if we've done in-line clfushing
> already.
> 
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Technically true, but we do we care enough to add the extra line of
confusion? Not sold on this one yet, maybe it will be neater in future?
-Chris
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index eaaf095..feb0b0c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -831,8 +831,9 @@  out:
 
 	if (hit_slowpath) {
 		/* Fixup: Flush dirty cachelines in case the object isn't in the
-		 * cpu write domain anymore. */
-		if (obj->base.write_domain != I915_GEM_DOMAIN_CPU) {
+		 * cpu write domain anymore, and we haven't flushed it manually. */
+		if (obj->base.write_domain != I915_GEM_DOMAIN_CPU &&
+		    !needs_clflush_after && obj->cache_level == I915_CACHE_NONE) {
 			i915_gem_clflush_object(obj);
 			i915_gem_chipset_flush(dev);
 		}