diff mbox

PCI: designware: add missing header guards

Message ID 002001cec0de$f4cd48d0$de67da70$%jun@samsung.com (mailing list archive)
State New, archived
Delegated to: Bjorn Helgaas
Headers show

Commit Message

Seungwon Jeon Oct. 4, 2013, 8:51 a.m. UTC
Added missing header guards against the redundant inclusion.

Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
---
 drivers/pci/host/pcie-designware.h |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

Comments

Jingoo Han Oct. 5, 2013, 12:25 a.m. UTC | #1
On Friday, October 04, 2013 5:52 PM, Seungwon Jeon wrote:
> 
> Added missing header guards against the redundant inclusion.
> 
> Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
> ---
>  drivers/pci/host/pcie-designware.h |    5 +++++
>  1 files changed, 5 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
> index faccbbf..0b685b5 100644
> --- a/drivers/pci/host/pcie-designware.h
> +++ b/drivers/pci/host/pcie-designware.h
> @@ -11,6 +11,9 @@
>   * published by the Free Software Foundation.
>   */
> 
> +#ifndef _PCIE_DESIGNWARE_H_
> +#define _PCIE_DESIGNWARE_H_

It looks good.
But, I prefer '_PCIE_DESIGNWARE_H'.
I will fix and send v2 patch, soon.

Best regards,
Jingoo Han

> +
>  struct pcie_port_info {
>  	u32		cfg0_size;
>  	u32		cfg1_size;
> @@ -77,3 +80,5 @@ int dw_pcie_host_init(struct pcie_port *pp);
>  int dw_pcie_setup(int nr, struct pci_sys_data *sys);
>  struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys);
>  int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
> +
> +#endif /* _PCIE_DESIGNWARE_H_ */
> --
> 1.7.0.4


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diff mbox

Patch

diff --git a/drivers/pci/host/pcie-designware.h b/drivers/pci/host/pcie-designware.h
index faccbbf..0b685b5 100644
--- a/drivers/pci/host/pcie-designware.h
+++ b/drivers/pci/host/pcie-designware.h
@@ -11,6 +11,9 @@ 
  * published by the Free Software Foundation.
  */
 
+#ifndef _PCIE_DESIGNWARE_H_
+#define _PCIE_DESIGNWARE_H_
+
 struct pcie_port_info {
 	u32		cfg0_size;
 	u32		cfg1_size;
@@ -77,3 +80,5 @@  int dw_pcie_host_init(struct pcie_port *pp);
 int dw_pcie_setup(int nr, struct pci_sys_data *sys);
 struct pci_bus *dw_pcie_scan_bus(int nr, struct pci_sys_data *sys);
 int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
+
+#endif /* _PCIE_DESIGNWARE_H_ */