| Message ID | 1388144644-9000-2-git-send-email-valentine.barshak@cogentembedded.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Commit | 29b3af2e8cfcdcd1f1346a78dac1614b0ae55cf4 |
| Headers | show |
On Fri, Dec 27, 2013 at 03:44:03PM +0400, Valentine Barshak wrote: > This adds VIN[0-3] clock support to R8A7790 SoC. > > Changes in V2: > * none. > > Changes in V3: > * capitalized ARM in the subject. > > Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Thanks, I will queue this up. -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Dec 27, 2013 at 03:44:03PM +0400, Valentine Barshak wrote: > This adds VIN[0-3] clock support to R8A7790 SoC. > > Changes in V2: > * none. > > Changes in V3: > * capitalized ARM in the subject. > > Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> > --- > arch/arm/mach-shmobile/clock-r8a7790.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c > index c5c60ec..81f45a0 100644 > --- a/arch/arm/mach-shmobile/clock-r8a7790.c > +++ b/arch/arm/mach-shmobile/clock-r8a7790.c > @@ -188,6 +188,7 @@ enum { > MSTP931, MSTP930, MSTP929, MSTP928, > MSTP917, > MSTP813, > + MSTP811, MSTP810, MSTP809, MSTP808, > MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720, > MSTP717, MSTP716, > MSTP704, > @@ -216,6 +217,10 @@ static struct clk mstp_clks[MSTP_NR] = { > [MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */ > [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */ > [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ > + [MSTP811] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 11, 0), /* VIN0 */ > + [MSTP810] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 10, 0), /* VIN1 */ > + [MSTP809] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 9, 0), /* VIN2 */ > + [MSTP808] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 8, 0), /* VIN3 */ > [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ > [MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */ > [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ > @@ -300,6 +305,10 @@ static struct clk_lookup lookups[] = { > CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]), > CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]), > CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]), > + CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]), > + CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]), > + CLKDEV_DEV_ID("r8a7790-vin.2", &mstp_clks[MSTP809]), > + CLKDEV_DEV_ID("r8a7790-vin.3", &mstp_clks[MSTP808]), > CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), > CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), > CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]), Unfortunately this patch conflicts with "ARM: shmobile: r8a7790: Wait for status on all MSTP clocks" which I have queued up as a fix for v3.14. As this patch will be submitted for inclusion on v3.15 it will be in a branch based on v3.14-rc1 which I expect to include (""ARM: shmobile: r8a7790: Wait for status on all MSTP clocks"). Rather than risk messing up doing the non-trivial rebase of this patch myself I have dropped this patch. Could you please rebase it on top of the latest devel tag of the renesas tree, currently renesas-devel-v3.13-rc7-20140108. -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 01/08/2014 08:17 AM, Simon Horman wrote: > On Fri, Dec 27, 2013 at 03:44:03PM +0400, Valentine Barshak wrote: >> This adds VIN[0-3] clock support to R8A7790 SoC. >> >> Changes in V2: >> * none. >> >> Changes in V3: >> * capitalized ARM in the subject. >> >> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> >> --- >> arch/arm/mach-shmobile/clock-r8a7790.c | 9 +++++++++ >> 1 file changed, 9 insertions(+) >> >> diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c >> index c5c60ec..81f45a0 100644 >> --- a/arch/arm/mach-shmobile/clock-r8a7790.c >> +++ b/arch/arm/mach-shmobile/clock-r8a7790.c >> @@ -188,6 +188,7 @@ enum { >> MSTP931, MSTP930, MSTP929, MSTP928, >> MSTP917, >> MSTP813, >> + MSTP811, MSTP810, MSTP809, MSTP808, >> MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720, >> MSTP717, MSTP716, >> MSTP704, >> @@ -216,6 +217,10 @@ static struct clk mstp_clks[MSTP_NR] = { >> [MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */ >> [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */ >> [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ >> + [MSTP811] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 11, 0), /* VIN0 */ >> + [MSTP810] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 10, 0), /* VIN1 */ >> + [MSTP809] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 9, 0), /* VIN2 */ >> + [MSTP808] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 8, 0), /* VIN3 */ >> [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ >> [MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */ >> [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ >> @@ -300,6 +305,10 @@ static struct clk_lookup lookups[] = { >> CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]), >> CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]), >> CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]), >> + CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]), >> + CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]), >> + CLKDEV_DEV_ID("r8a7790-vin.2", &mstp_clks[MSTP809]), >> + CLKDEV_DEV_ID("r8a7790-vin.3", &mstp_clks[MSTP808]), >> CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), >> CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), >> CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]), > > Unfortunately this patch conflicts with "ARM: shmobile: r8a7790: Wait for > status on all MSTP clocks" which I have queued up as a fix for v3.14. > > As this patch will be submitted for inclusion on v3.15 it will be in a > branch based on v3.14-rc1 which I expect to include (""ARM: shmobile: > r8a7790: Wait for status on all MSTP clocks"). > > Rather than risk messing up doing the non-trivial rebase of this > patch myself I have dropped this patch. Could you please rebase it > on top of the latest devel tag of the renesas tree, currently > renesas-devel-v3.13-rc7-20140108. If you don't mind, I'll split out and bundle all the clock-related patches up in one series. This includes VIN, USB host, SATA clocks. Clocks do not depend on anything else and can be applied with no harm even if the driver that needs them is still pending. Besides, it should minimize possible conflicts. Thanks, Val. > -- > To unsubscribe from this list: send the line "unsubscribe linux-sh" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c index c5c60ec..81f45a0 100644 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ b/arch/arm/mach-shmobile/clock-r8a7790.c @@ -188,6 +188,7 @@ enum { MSTP931, MSTP930, MSTP929, MSTP928, MSTP917, MSTP813, + MSTP811, MSTP810, MSTP809, MSTP808, MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720, MSTP717, MSTP716, MSTP704, @@ -216,6 +217,10 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP928] = SH_CLK_MSTP32(&p_clk, SMSTPCR9, 28, 0), /* I2C3 */ [MSTP917] = SH_CLK_MSTP32(&qspi_clk, SMSTPCR9, 17, 0), /* QSPI */ [MSTP813] = SH_CLK_MSTP32(&p_clk, SMSTPCR8, 13, 0), /* Ether */ + [MSTP811] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 11, 0), /* VIN0 */ + [MSTP810] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 10, 0), /* VIN1 */ + [MSTP809] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 9, 0), /* VIN2 */ + [MSTP808] = SH_CLK_MSTP32(&zg_clk, SMSTPCR8, 8, 0), /* VIN3 */ [MSTP726] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 26, 0), /* LVDS0 */ [MSTP725] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 25, 0), /* LVDS1 */ [MSTP724] = SH_CLK_MSTP32(&zx_clk, SMSTPCR7, 24, 0), /* DU0 */ @@ -300,6 +305,10 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP928]), CLKDEV_DEV_ID("i2c-rcar.3", &mstp_clks[MSTP928]), CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]), + CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]), + CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]), + CLKDEV_DEV_ID("r8a7790-vin.2", &mstp_clks[MSTP809]), + CLKDEV_DEV_ID("r8a7790-vin.3", &mstp_clks[MSTP808]), CLKDEV_DEV_ID("e61f0000.thermal", &mstp_clks[MSTP522]), CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), CLKDEV_DEV_ID("ee200000.mmc", &mstp_clks[MSTP315]),
This adds VIN[0-3] clock support to R8A7790 SoC. Changes in V2: * none. Changes in V3: * capitalized ARM in the subject. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> --- arch/arm/mach-shmobile/clock-r8a7790.c | 9 +++++++++ 1 file changed, 9 insertions(+)