[01/15] pinctrl: sh-pfc: r8a77994: Remove bogus IPSR9 field
diff mbox series

Message ID 20181213182714.26094-2-geert+renesas@glider.be
State New
Headers show
Series
  • pinctrl: sh-pfc: Fix config register descriptions
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Commit Message

Geert Uytterhoeven Dec. 13, 2018, 6:27 p.m. UTC
The Peripheral Function Select Register 9 contains 12 fields, but the
variable field descriptor contains a 13th bogus field of 3 bits.

Fixes: 43c4436e2f1890a7 ("pinctrl: sh-pfc: add R8A7794 PFC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
 drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Sergei Shtylyov Dec. 14, 2018, 8 a.m. UTC | #1
Hello!

    like I told you on IRC, the subjects of this and next 2 patches has 
duplicate 9 in the model #s...

MBR, Sergei
Geert Uytterhoeven Dec. 14, 2018, 9:38 a.m. UTC | #2
Hi Sergei,

On Fri, Dec 14, 2018 at 9:00 AM Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
>     like I told you on IRC, the subjects of this and next 2 patches has
> duplicate 9 in the model #s...

Thanks, already fixed locally, as I told you on IRC ;-)

Gr{oetje,eeting}s,

                        Geert
Simon Horman Dec. 17, 2018, 1:38 p.m. UTC | #3
On Thu, Dec 13, 2018 at 07:27:00PM +0100, Geert Uytterhoeven wrote:
> The Peripheral Function Select Register 9 contains 12 fields, but the
> variable field descriptor contains a 13th bogus field of 3 bits.
> 
> Fixes: 43c4436e2f1890a7 ("pinctrl: sh-pfc: add R8A7794 PFC support")
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Reviewed-by: Simon Horman <horms+renesas@verge.net.au>

Patch
diff mbox series

diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
index b96a3cc79084ddcc..fcf1339c40584385 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
@@ -5212,7 +5212,7 @@  static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 		FN_AVB_MDC, FN_SSI_SDATA6_B, 0, 0, }
 	},
 	{ PINMUX_CFG_REG_VAR("IPSR9", 0xE6060044, 32,
-			     1, 3, 3, 3, 3, 2, 2, 3, 3, 3, 3, 3, 3) {
+			     1, 3, 3, 3, 3, 2, 2, 3, 3, 3, 3, 3) {
 		/* IP9_31 [1] */
 		0, 0,
 		/* IP9_30_28 [3] */