diff mbox series

[3/3] drm/i915: do not mix workaround with normal flow

Message ID 20190404230426.15837-4-lucas.demarchi@intel.com (mailing list archive)
State New, archived
Headers show
Series Trivial comments and small changes | expand

Commit Message

Lucas De Marchi April 4, 2019, 11:04 p.m. UTC
Separate the two comments: one is a workaround and the other is a sanity
check. We could just compare != 1, but let's treat them differently due
to having different meaning.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

Comments

Rodrigo Vivi April 8, 2019, 10:37 p.m. UTC | #1
On Thu, Apr 04, 2019 at 04:04:26PM -0700, Lucas De Marchi wrote:
> Separate the two comments: one is a workaround and the other is a sanity
> check. We could just compare != 1, but let's treat them differently due
> to having different meaning.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 25eff3728fcd..b4d1078727dc 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3760,14 +3760,16 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
>  		sagv_block_time_us = 10;
>  
>  	/*
> -	 * SKL+ workaround: bspec recommends we disable SAGV when we have
> -	 * more then one pipe enabled
> -	 *
>  	 * If there are no active CRTCs, no additional checks need be performed
>  	 */
>  	if (hweight32(intel_state->active_crtcs) == 0)
>  		return true;
> -	else if (hweight32(intel_state->active_crtcs) > 1)
> +
> +	/*
> +	 * SKL+ workaround: bspec recommends we disable SAGV when we have
> +	 * more then one pipe enabled
> +	 */
> +	if (hweight32(intel_state->active_crtcs) > 1)
>  		return false;
>  
>  	/* Since we're now guaranteed to only have one active CRTC... */
> -- 
> 2.21.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 25eff3728fcd..b4d1078727dc 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3760,14 +3760,16 @@  bool intel_can_enable_sagv(struct drm_atomic_state *state)
 		sagv_block_time_us = 10;
 
 	/*
-	 * SKL+ workaround: bspec recommends we disable SAGV when we have
-	 * more then one pipe enabled
-	 *
 	 * If there are no active CRTCs, no additional checks need be performed
 	 */
 	if (hweight32(intel_state->active_crtcs) == 0)
 		return true;
-	else if (hweight32(intel_state->active_crtcs) > 1)
+
+	/*
+	 * SKL+ workaround: bspec recommends we disable SAGV when we have
+	 * more then one pipe enabled
+	 */
+	if (hweight32(intel_state->active_crtcs) > 1)
 		return false;
 
 	/* Since we're now guaranteed to only have one active CRTC... */