diff mbox series

[v2] riscv: dts: sifive: Drop "clock-frequency" property of cpu nodes

Message ID 1567687553-22334-1-git-send-email-bmeng.cn@gmail.com (mailing list archive)
State New, archived
Headers show
Series [v2] riscv: dts: sifive: Drop "clock-frequency" property of cpu nodes | expand

Commit Message

Bin Meng Sept. 5, 2019, 12:45 p.m. UTC 
The "clock-frequency" property of cpu nodes isn't required. Drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v2:
- drop "clock-frequency" property of cpu nodes

 arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 3 ---
 1 file changed, 3 deletions(-)

Comments

Christoph Hellwig Sept. 10, 2019, 6:14 a.m. UTC | #1 
On Thu, Sep 05, 2019 at 05:45:53AM -0700, Bin Meng wrote:
> The "clock-frequency" property of cpu nodes isn't required. Drop it.
> 
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

Looks good:

Reviewed-by: Christoph Hellwig <hch@lst.de>
Bin Meng Sept. 19, 2019, 10:02 a.m. UTC | #2 
Hi,

On Tue, Sep 10, 2019 at 2:14 PM Christoph Hellwig <hch@infradead.org> wrote:
>
> On Thu, Sep 05, 2019 at 05:45:53AM -0700, Bin Meng wrote:
> > The "clock-frequency" property of cpu nodes isn't required. Drop it.
> >
> > Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> Looks good:
>
> Reviewed-by: Christoph Hellwig <hch@lst.de>

What's the status of this patch? thanks!

Regards,
Bin
Paul Walmsley Sept. 19, 2019, 12:55 p.m. UTC | #3 
On Thu, 5 Sep 2019, Bin Meng wrote:

> The "clock-frequency" property of cpu nodes isn't required. Drop it.
> 
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

Thanks, queued for v5.4-rc with Christoph's Reviewed-by:.

- Paul
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
index 42b5ec2..a9d48ff 100644
--- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
+++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi
@@ -60,7 +60,6 @@ 
 			};
 		};
 		cpu2: cpu@2 {
-			clock-frequency = <0>;
 			compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
 			d-cache-block-size = <64>;
 			d-cache-sets = <64>;
@@ -84,7 +83,6 @@ 
 			};
 		};
 		cpu3: cpu@3 {
-			clock-frequency = <0>;
 			compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
 			d-cache-block-size = <64>;
 			d-cache-sets = <64>;
@@ -108,7 +106,6 @@ 
 			};
 		};
 		cpu4: cpu@4 {
-			clock-frequency = <0>;
 			compatible = "sifive,u54-mc", "sifive,rocket0", "riscv";
 			d-cache-block-size = <64>;
 			d-cache-sets = <64>;