| Message ID | 1574235842-7930-4-git-send-email-kalyani.akula@xilinx.com (mailing list archive) |
|---|---|
| State | Deferred |
| Delegated to: | Herbert Xu |
| Headers | show |
| Series | Add Xilinx's ZynqMP AES-GCM driver support | expand |
On 20. 11. 19 8:44, Kalyani Akula wrote: > Add ZynqMP firmware AES API to perform encryption/decryption of given data. > > Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com> > --- > drivers/firmware/xilinx/zynqmp.c | 23 +++++++++++++++++++++++ > include/linux/firmware/xlnx-zynqmp.h | 2 ++ > 2 files changed, 25 insertions(+) > > diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c > index fd3d837..7ddf38e 100644 > --- a/drivers/firmware/xilinx/zynqmp.c > +++ b/drivers/firmware/xilinx/zynqmp.c > @@ -664,6 +664,28 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, > qos, ack, NULL); > } > > +/** > + * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using > + * AES-GCM core. > + * @address: Address of the AesParams structure. > + * @out: Returned output value > + * > + * Return: Returns status, either success or error code. > + */ > +static int zynqmp_pm_aes_engine(const u64 address, u32 *out) > +{ > + u32 ret_payload[PAYLOAD_ARG_CNT]; > + int ret; > + > + if (!out) > + return -EINVAL; > + > + ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address), > + lower_32_bits(address), > + 0, 0, ret_payload); > + *out = ret_payload[1]; newline here please. > + return ret; > +} newline here please. > static const struct zynqmp_eemi_ops eemi_ops = { > .get_api_version = zynqmp_pm_get_api_version, > .get_chipid = zynqmp_pm_get_chipid, > @@ -687,6 +709,7 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, > .set_requirement = zynqmp_pm_set_requirement, > .fpga_load = zynqmp_pm_fpga_load, > .fpga_get_status = zynqmp_pm_fpga_get_status, > + .aes = zynqmp_pm_aes_engine, > }; > > /** > diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h > index 778abbb..508edd7 100644 > --- a/include/linux/firmware/xlnx-zynqmp.h > +++ b/include/linux/firmware/xlnx-zynqmp.h > @@ -77,6 +77,7 @@ enum pm_api_id { > PM_CLOCK_GETRATE, > PM_CLOCK_SETPARENT, > PM_CLOCK_GETPARENT, > + PM_SECURE_AES = 47, > }; > > /* PMU-FW return status codes */ > @@ -294,6 +295,7 @@ struct zynqmp_eemi_ops { > const u32 capabilities, > const u32 qos, > const enum zynqmp_pm_request_ack ack); > + int (*aes)(const u64 address, u32 *out); > }; > > int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, > Thanks, Michal
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index fd3d837..7ddf38e 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -664,6 +664,28 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, qos, ack, NULL); } +/** + * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using + * AES-GCM core. + * @address: Address of the AesParams structure. + * @out: Returned output value + * + * Return: Returns status, either success or error code. + */ +static int zynqmp_pm_aes_engine(const u64 address, u32 *out) +{ + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + if (!out) + return -EINVAL; + + ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address), + lower_32_bits(address), + 0, 0, ret_payload); + *out = ret_payload[1]; + return ret; +} static const struct zynqmp_eemi_ops eemi_ops = { .get_api_version = zynqmp_pm_get_api_version, .get_chipid = zynqmp_pm_get_chipid, @@ -687,6 +709,7 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, .set_requirement = zynqmp_pm_set_requirement, .fpga_load = zynqmp_pm_fpga_load, .fpga_get_status = zynqmp_pm_fpga_get_status, + .aes = zynqmp_pm_aes_engine, }; /** diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 778abbb..508edd7 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -77,6 +77,7 @@ enum pm_api_id { PM_CLOCK_GETRATE, PM_CLOCK_SETPARENT, PM_CLOCK_GETPARENT, + PM_SECURE_AES = 47, }; /* PMU-FW return status codes */ @@ -294,6 +295,7 @@ struct zynqmp_eemi_ops { const u32 capabilities, const u32 qos, const enum zynqmp_pm_request_ack ack); + int (*aes)(const u64 address, u32 *out); }; int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
Add ZynqMP firmware AES API to perform encryption/decryption of given data. Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com> --- drivers/firmware/xilinx/zynqmp.c | 23 +++++++++++++++++++++++ include/linux/firmware/xlnx-zynqmp.h | 2 ++ 2 files changed, 25 insertions(+)