| Message ID | 20200504225227.464666-16-matthew.d.roper@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce Rocket Lake | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Matt > Roper > Sent: Tuesday, May 5, 2020 4:22 AM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v2 15/22] drm/i915/rkl: Add DDC pin mapping > > The pin mapping for the final two outputs varies according to which PCH is > present on the platform: with TGP the pins are remapped into the TC range, > whereas with CMP they stay in the traditional combo output range. > > Bspec: 49181 > Cc: Aditya Swarup <aditya.swarup@intel.com> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > drivers/gpu/drm/i915/display/intel_hdmi.c | 22 +++++++++++++++++++++- > 1 file changed, 21 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c > b/drivers/gpu/drm/i915/display/intel_hdmi.c > index 010f37240710..a31a98d26882 100644 > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c > @@ -3082,6 +3082,24 @@ static u8 mcc_port_to_ddc_pin(struct > drm_i915_private *dev_priv, enum port port) > return ddc_pin; > } > > +static u8 rkl_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum > +port port) { > + enum phy phy = intel_port_to_phy(dev_priv, port); > + > + WARN_ON(port == PORT_C); > + > + /* > + * Pin mapping for RKL depends on which PCH is present. With TGP, > the > + * final two outputs use type-c pins, even though they're actually > + * combo outputs. With CMP, the traditional DDI A-D pins are used for > + * all outputs. > + */ > + if (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP && phy >= PHY_C) > + return GMBUS_PIN_9_TC1_ICP + phy - PHY_C; > + > + return GMBUS_PIN_1_BXT + phy; > +} > + > static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv, > enum port port) > { > @@ -3119,7 +3137,9 @@ static u8 intel_hdmi_ddc_pin(struct intel_encoder > *encoder) > return ddc_pin; > } > > - if (HAS_PCH_MCC(dev_priv)) > + if (IS_ROCKETLAKE(dev_priv)) > + ddc_pin = rkl_port_to_ddc_pin(dev_priv, port); > + else if (HAS_PCH_MCC(dev_priv)) > ddc_pin = mcc_port_to_ddc_pin(dev_priv, port); > else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) > ddc_pin = icl_port_to_ddc_pin(dev_priv, port); > -- > 2.24.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 010f37240710..a31a98d26882 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -3082,6 +3082,24 @@ static u8 mcc_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) return ddc_pin; } +static u8 rkl_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) +{ + enum phy phy = intel_port_to_phy(dev_priv, port); + + WARN_ON(port == PORT_C); + + /* + * Pin mapping for RKL depends on which PCH is present. With TGP, the + * final two outputs use type-c pins, even though they're actually + * combo outputs. With CMP, the traditional DDI A-D pins are used for + * all outputs. + */ + if (INTEL_PCH_TYPE(dev_priv) >= PCH_TGP && phy >= PHY_C) + return GMBUS_PIN_9_TC1_ICP + phy - PHY_C; + + return GMBUS_PIN_1_BXT + phy; +} + static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) { @@ -3119,7 +3137,9 @@ static u8 intel_hdmi_ddc_pin(struct intel_encoder *encoder) return ddc_pin; } - if (HAS_PCH_MCC(dev_priv)) + if (IS_ROCKETLAKE(dev_priv)) + ddc_pin = rkl_port_to_ddc_pin(dev_priv, port); + else if (HAS_PCH_MCC(dev_priv)) ddc_pin = mcc_port_to_ddc_pin(dev_priv, port); else if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) ddc_pin = icl_port_to_ddc_pin(dev_priv, port);
The pin mapping for the final two outputs varies according to which PCH is present on the platform: with TGP the pins are remapped into the TC range, whereas with CMP they stay in the traditional combo output range. Bspec: 49181 Cc: Aditya Swarup <aditya.swarup@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> --- drivers/gpu/drm/i915/display/intel_hdmi.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-)