diff mbox

[v3,4/8] PCI hotplug: add pci_configure_slot()

Message ID 20090902225020.12417.97538.stgit@bob.kio (mailing list archive)
State Superseded, archived
Headers show

Commit Message

Bjorn Helgaas Sept. 2, 2009, 10:50 p.m. UTC 
This patch adds a new pci_configure_slot() function that programs the
PCI bus characteristics for a newly-added device.  This is based on
code in pciehp_pci.c, but should be generic enough to be used by pciehp,
shpchp, and acpiphp.

The hotplug_params struct and the program_hpp_typeX() functions are based
on the ACPI definitions, but they aren't really ACPI-specific, and there's
no alternate implementation, so I don't see the need to abstract them yet.

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Reviewed-by: Alex Chiang <achiang@hp.com>
---
 drivers/pci/hotplug/Makefile     |    2 
 drivers/pci/hotplug/pcihp_slot.c |  187 ++++++++++++++++++++++++++++++++++++++
 include/linux/pci_hotplug.h      |    9 ++
 3 files changed, 197 insertions(+), 1 deletions(-)
 create mode 100644 drivers/pci/hotplug/pcihp_slot.c


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Comments

Kenji Kaneshige Sept. 3, 2009, 12:56 a.m. UTC | #1 
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>


Bjorn Helgaas wrote:
> This patch adds a new pci_configure_slot() function that programs the
> PCI bus characteristics for a newly-added device.  This is based on
> code in pciehp_pci.c, but should be generic enough to be used by pciehp,
> shpchp, and acpiphp.
> 
> The hotplug_params struct and the program_hpp_typeX() functions are based
> on the ACPI definitions, but they aren't really ACPI-specific, and there's
> no alternate implementation, so I don't see the need to abstract them yet.
> 
> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
> Reviewed-by: Alex Chiang <achiang@hp.com>
> ---
>  drivers/pci/hotplug/Makefile     |    2 
>  drivers/pci/hotplug/pcihp_slot.c |  187 ++++++++++++++++++++++++++++++++++++++
>  include/linux/pci_hotplug.h      |    9 ++
>  3 files changed, 197 insertions(+), 1 deletions(-)
>  create mode 100644 drivers/pci/hotplug/pcihp_slot.c
> 
> diff --git a/drivers/pci/hotplug/Makefile b/drivers/pci/hotplug/Makefile
> index 2aa117c..3625b09 100644
> --- a/drivers/pci/hotplug/Makefile
> +++ b/drivers/pci/hotplug/Makefile
> @@ -22,7 +22,7 @@ obj-$(CONFIG_HOTPLUG_PCI_SGI)		+= sgi_hotplug.o
>  # Link this last so it doesn't claim devices that have a real hotplug driver
>  obj-$(CONFIG_HOTPLUG_PCI_FAKE)		+= fakephp.o
>  
> -pci_hotplug-objs	:=	pci_hotplug_core.o
> +pci_hotplug-objs	:=	pci_hotplug_core.o pcihp_slot.o
>  
>  ifdef CONFIG_HOTPLUG_PCI_CPCI
>  pci_hotplug-objs	+=	cpci_hotplug_core.o	\
> diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c
> new file mode 100644
> index 0000000..cc8ec3a
> --- /dev/null
> +++ b/drivers/pci/hotplug/pcihp_slot.c
> @@ -0,0 +1,187 @@
> +/*
> + * Copyright (C) 1995,2001 Compaq Computer Corporation
> + * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
> + * Copyright (C) 2001 IBM Corp.
> + * Copyright (C) 2003-2004 Intel Corporation
> + * (c) Copyright 2009 Hewlett-Packard Development Company, L.P.
> + *
> + * All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or (at
> + * your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
> + * NON INFRINGEMENT.  See the GNU General Public License for more
> + * details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +#include <linux/pci.h>
> +#include <linux/pci_hotplug.h>
> +
> +static struct hpp_type0 pci_default_type0 = {
> +	.revision = 1,
> +	.cache_line_size = 8,
> +	.latency_timer = 0x40,
> +	.enable_serr = 0,
> +	.enable_perr = 0,
> +};
> +
> +static void program_hpp_type0(struct pci_dev *dev, struct hpp_type0 *hpp)
> +{
> +	u16 pci_cmd, pci_bctl;
> +
> +	if (!hpp) {
> +		/*
> +		 * Perhaps we *should* use default settings for PCIe, but
> +		 * pciehp didn't, so we won't either.
> +		 */
> +		if (dev->is_pcie)
> +			return;
> +		dev_info(&dev->dev, "using default PCI settings\n");
> +		hpp = &pci_default_type0;
> +	}
> +
> +	if (hpp->revision > 1) {
> +		dev_warn(&dev->dev,
> +			 "PCI settings rev %d not supported; using defaults\n",
> +			 hpp->revision);
> +		hpp = &pci_default_type0;
> +	}
> +
> +	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpp->cache_line_size);
> +	pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp->latency_timer);
> +	pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
> +	if (hpp->enable_serr)
> +		pci_cmd |= PCI_COMMAND_SERR;
> +	else
> +		pci_cmd &= ~PCI_COMMAND_SERR;
> +	if (hpp->enable_perr)
> +		pci_cmd |= PCI_COMMAND_PARITY;
> +	else
> +		pci_cmd &= ~PCI_COMMAND_PARITY;
> +	pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
> +
> +	/* Program bridge control value */
> +	if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
> +		pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER,
> +				      hpp->latency_timer);
> +		pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl);
> +		if (hpp->enable_serr)
> +			pci_bctl |= PCI_BRIDGE_CTL_SERR;
> +		else
> +			pci_bctl &= ~PCI_BRIDGE_CTL_SERR;
> +		if (hpp->enable_perr)
> +			pci_bctl |= PCI_BRIDGE_CTL_PARITY;
> +		else
> +			pci_bctl &= ~PCI_BRIDGE_CTL_PARITY;
> +		pci_write_config_word(dev, PCI_BRIDGE_CONTROL, pci_bctl);
> +	}
> +}
> +
> +static void program_hpp_type1(struct pci_dev *dev, struct hpp_type1 *hpp)
> +{
> +	if (hpp)
> +		dev_warn(&dev->dev, "PCI-X settings not supported\n");
> +}
> +
> +static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
> +{
> +	int pos;
> +	u16 reg16;
> +	u32 reg32;
> +
> +	if (!hpp)
> +		return;
> +
> +	/* Find PCI Express capability */
> +	pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
> +	if (!pos)
> +		return;
> +
> +	if (hpp->revision > 1) {
> +		dev_warn(&dev->dev, "PCIe settings rev %d not supported\n",
> +			 hpp->revision);
> +		return;
> +	}
> +
> +	/* Initialize Device Control Register */
> +	pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
> +	reg16 = (reg16 & hpp->pci_exp_devctl_and) | hpp->pci_exp_devctl_or;
> +	pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
> +
> +	/* Initialize Link Control Register */
> +	if (dev->subordinate) {
> +		pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &reg16);
> +		reg16 = (reg16 & hpp->pci_exp_lnkctl_and)
> +			| hpp->pci_exp_lnkctl_or;
> +		pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, reg16);
> +	}
> +
> +	/* Find Advanced Error Reporting Enhanced Capability */
> +	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
> +	if (!pos)
> +		return;
> +
> +	/* Initialize Uncorrectable Error Mask Register */
> +	pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &reg32);
> +	reg32 = (reg32 & hpp->unc_err_mask_and) | hpp->unc_err_mask_or;
> +	pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, reg32);
> +
> +	/* Initialize Uncorrectable Error Severity Register */
> +	pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &reg32);
> +	reg32 = (reg32 & hpp->unc_err_sever_and) | hpp->unc_err_sever_or;
> +	pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, reg32);
> +
> +	/* Initialize Correctable Error Mask Register */
> +	pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &reg32);
> +	reg32 = (reg32 & hpp->cor_err_mask_and) | hpp->cor_err_mask_or;
> +	pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, reg32);
> +
> +	/* Initialize Advanced Error Capabilities and Control Register */
> +	pci_read_config_dword(dev, pos + PCI_ERR_CAP, &reg32);
> +	reg32 = (reg32 & hpp->adv_err_cap_and) | hpp->adv_err_cap_or;
> +	pci_write_config_dword(dev, pos + PCI_ERR_CAP, reg32);
> +
> +	/*
> +	 * FIXME: The following two registers are not supported yet.
> +	 *
> +	 *   o Secondary Uncorrectable Error Severity Register
> +	 *   o Secondary Uncorrectable Error Mask Register
> +	 */
> +}
> +
> +void pci_configure_slot(struct pci_dev *dev)
> +{
> +	struct pci_dev *cdev;
> +	struct hotplug_params hpp;
> +	int ret;
> +
> +	if (!(dev->hdr_type == PCI_HEADER_TYPE_NORMAL ||
> +			(dev->hdr_type == PCI_HEADER_TYPE_BRIDGE &&
> +			(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
> +		return;
> +
> +	memset(&hpp, 0, sizeof(hpp));
> +	ret = pci_get_hp_params(dev, &hpp);
> +	if (ret)
> +		dev_warn(&dev->dev, "no hotplug settings from platform\n");
> +
> +	program_hpp_type2(dev, hpp.t2);
> +	program_hpp_type1(dev, hpp.t1);
> +	program_hpp_type0(dev, hpp.t0);
> +
> +	if (dev->subordinate) {
> +		list_for_each_entry(cdev, &dev->subordinate->devices,
> +				    bus_list)
> +			pci_configure_slot(cdev);
> +	}
> +}
> +EXPORT_SYMBOL_GPL(pci_configure_slot);
> diff --git a/include/linux/pci_hotplug.h b/include/linux/pci_hotplug.h
> index 46e3e71..95712ec 100644
> --- a/include/linux/pci_hotplug.h
> +++ b/include/linux/pci_hotplug.h
> @@ -231,6 +231,15 @@ int acpi_get_hp_params_from_firmware(struct pci_dev *dev,
>  int acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev, u32 flags);
>  int acpi_pci_check_ejectable(struct pci_bus *pbus, acpi_handle handle);
>  int acpi_pci_detect_ejectable(struct pci_bus *pbus);
> +#define pci_get_hp_params(dev, hpp)  acpi_get_hp_params_from_firmware(dev, hpp)
> +#else
> +static inline int pci_get_hp_params(struct pci_dev *dev,
> +				    struct hotplug_params *hpp)
> +{
> +	return -ENODEV;
> +}
>  #endif
> +
> +void pci_configure_slot(struct pci_dev *dev);
>  #endif
>  
> 
> --
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> 
> 


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diff mbox

Patch

diff --git a/drivers/pci/hotplug/Makefile b/drivers/pci/hotplug/Makefile
index 2aa117c..3625b09 100644
--- a/drivers/pci/hotplug/Makefile
+++ b/drivers/pci/hotplug/Makefile
@@ -22,7 +22,7 @@  obj-$(CONFIG_HOTPLUG_PCI_SGI)		+= sgi_hotplug.o
 # Link this last so it doesn't claim devices that have a real hotplug driver
 obj-$(CONFIG_HOTPLUG_PCI_FAKE)		+= fakephp.o
 
-pci_hotplug-objs	:=	pci_hotplug_core.o
+pci_hotplug-objs	:=	pci_hotplug_core.o pcihp_slot.o
 
 ifdef CONFIG_HOTPLUG_PCI_CPCI
 pci_hotplug-objs	+=	cpci_hotplug_core.o	\
diff --git a/drivers/pci/hotplug/pcihp_slot.c b/drivers/pci/hotplug/pcihp_slot.c
new file mode 100644
index 0000000..cc8ec3a
--- /dev/null
+++ b/drivers/pci/hotplug/pcihp_slot.c
@@ -0,0 +1,187 @@ 
+/*
+ * Copyright (C) 1995,2001 Compaq Computer Corporation
+ * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
+ * Copyright (C) 2001 IBM Corp.
+ * Copyright (C) 2003-2004 Intel Corporation
+ * (c) Copyright 2009 Hewlett-Packard Development Company, L.P.
+ *
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ * NON INFRINGEMENT.  See the GNU General Public License for more
+ * details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/pci.h>
+#include <linux/pci_hotplug.h>
+
+static struct hpp_type0 pci_default_type0 = {
+	.revision = 1,
+	.cache_line_size = 8,
+	.latency_timer = 0x40,
+	.enable_serr = 0,
+	.enable_perr = 0,
+};
+
+static void program_hpp_type0(struct pci_dev *dev, struct hpp_type0 *hpp)
+{
+	u16 pci_cmd, pci_bctl;
+
+	if (!hpp) {
+		/*
+		 * Perhaps we *should* use default settings for PCIe, but
+		 * pciehp didn't, so we won't either.
+		 */
+		if (dev->is_pcie)
+			return;
+		dev_info(&dev->dev, "using default PCI settings\n");
+		hpp = &pci_default_type0;
+	}
+
+	if (hpp->revision > 1) {
+		dev_warn(&dev->dev,
+			 "PCI settings rev %d not supported; using defaults\n",
+			 hpp->revision);
+		hpp = &pci_default_type0;
+	}
+
+	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpp->cache_line_size);
+	pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp->latency_timer);
+	pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
+	if (hpp->enable_serr)
+		pci_cmd |= PCI_COMMAND_SERR;
+	else
+		pci_cmd &= ~PCI_COMMAND_SERR;
+	if (hpp->enable_perr)
+		pci_cmd |= PCI_COMMAND_PARITY;
+	else
+		pci_cmd &= ~PCI_COMMAND_PARITY;
+	pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
+
+	/* Program bridge control value */
+	if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
+		pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER,
+				      hpp->latency_timer);
+		pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl);
+		if (hpp->enable_serr)
+			pci_bctl |= PCI_BRIDGE_CTL_SERR;
+		else
+			pci_bctl &= ~PCI_BRIDGE_CTL_SERR;
+		if (hpp->enable_perr)
+			pci_bctl |= PCI_BRIDGE_CTL_PARITY;
+		else
+			pci_bctl &= ~PCI_BRIDGE_CTL_PARITY;
+		pci_write_config_word(dev, PCI_BRIDGE_CONTROL, pci_bctl);
+	}
+}
+
+static void program_hpp_type1(struct pci_dev *dev, struct hpp_type1 *hpp)
+{
+	if (hpp)
+		dev_warn(&dev->dev, "PCI-X settings not supported\n");
+}
+
+static void program_hpp_type2(struct pci_dev *dev, struct hpp_type2 *hpp)
+{
+	int pos;
+	u16 reg16;
+	u32 reg32;
+
+	if (!hpp)
+		return;
+
+	/* Find PCI Express capability */
+	pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+	if (!pos)
+		return;
+
+	if (hpp->revision > 1) {
+		dev_warn(&dev->dev, "PCIe settings rev %d not supported\n",
+			 hpp->revision);
+		return;
+	}
+
+	/* Initialize Device Control Register */
+	pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &reg16);
+	reg16 = (reg16 & hpp->pci_exp_devctl_and) | hpp->pci_exp_devctl_or;
+	pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
+
+	/* Initialize Link Control Register */
+	if (dev->subordinate) {
+		pci_read_config_word(dev, pos + PCI_EXP_LNKCTL, &reg16);
+		reg16 = (reg16 & hpp->pci_exp_lnkctl_and)
+			| hpp->pci_exp_lnkctl_or;
+		pci_write_config_word(dev, pos + PCI_EXP_LNKCTL, reg16);
+	}
+
+	/* Find Advanced Error Reporting Enhanced Capability */
+	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
+	if (!pos)
+		return;
+
+	/* Initialize Uncorrectable Error Mask Register */
+	pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, &reg32);
+	reg32 = (reg32 & hpp->unc_err_mask_and) | hpp->unc_err_mask_or;
+	pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, reg32);
+
+	/* Initialize Uncorrectable Error Severity Register */
+	pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &reg32);
+	reg32 = (reg32 & hpp->unc_err_sever_and) | hpp->unc_err_sever_or;
+	pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, reg32);
+
+	/* Initialize Correctable Error Mask Register */
+	pci_read_config_dword(dev, pos + PCI_ERR_COR_MASK, &reg32);
+	reg32 = (reg32 & hpp->cor_err_mask_and) | hpp->cor_err_mask_or;
+	pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, reg32);
+
+	/* Initialize Advanced Error Capabilities and Control Register */
+	pci_read_config_dword(dev, pos + PCI_ERR_CAP, &reg32);
+	reg32 = (reg32 & hpp->adv_err_cap_and) | hpp->adv_err_cap_or;
+	pci_write_config_dword(dev, pos + PCI_ERR_CAP, reg32);
+
+	/*
+	 * FIXME: The following two registers are not supported yet.
+	 *
+	 *   o Secondary Uncorrectable Error Severity Register
+	 *   o Secondary Uncorrectable Error Mask Register
+	 */
+}
+
+void pci_configure_slot(struct pci_dev *dev)
+{
+	struct pci_dev *cdev;
+	struct hotplug_params hpp;
+	int ret;
+
+	if (!(dev->hdr_type == PCI_HEADER_TYPE_NORMAL ||
+			(dev->hdr_type == PCI_HEADER_TYPE_BRIDGE &&
+			(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
+		return;
+
+	memset(&hpp, 0, sizeof(hpp));
+	ret = pci_get_hp_params(dev, &hpp);
+	if (ret)
+		dev_warn(&dev->dev, "no hotplug settings from platform\n");
+
+	program_hpp_type2(dev, hpp.t2);
+	program_hpp_type1(dev, hpp.t1);
+	program_hpp_type0(dev, hpp.t0);
+
+	if (dev->subordinate) {
+		list_for_each_entry(cdev, &dev->subordinate->devices,
+				    bus_list)
+			pci_configure_slot(cdev);
+	}
+}
+EXPORT_SYMBOL_GPL(pci_configure_slot);
diff --git a/include/linux/pci_hotplug.h b/include/linux/pci_hotplug.h
index 46e3e71..95712ec 100644
--- a/include/linux/pci_hotplug.h
+++ b/include/linux/pci_hotplug.h
@@ -231,6 +231,15 @@  int acpi_get_hp_params_from_firmware(struct pci_dev *dev,
 int acpi_get_hp_hw_control_from_firmware(struct pci_dev *dev, u32 flags);
 int acpi_pci_check_ejectable(struct pci_bus *pbus, acpi_handle handle);
 int acpi_pci_detect_ejectable(struct pci_bus *pbus);
+#define pci_get_hp_params(dev, hpp)  acpi_get_hp_params_from_firmware(dev, hpp)
+#else
+static inline int pci_get_hp_params(struct pci_dev *dev,
+				    struct hotplug_params *hpp)
+{
+	return -ENODEV;
+}
 #endif
+
+void pci_configure_slot(struct pci_dev *dev);
 #endif