@@ -71,6 +71,7 @@
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
+ .spectral_bin_discard = 0,
},
{
.id = QCA9887_HW_1_0_VERSION,
@@ -91,6 +92,7 @@
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
+ .spectral_bin_discard = 0,
},
{
.id = QCA6174_HW_2_1_VERSION,
@@ -110,6 +112,7 @@
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
+ .spectral_bin_discard = 0,
},
{
.id = QCA6174_HW_2_1_VERSION,
@@ -129,6 +132,7 @@
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
+ .spectral_bin_discard = 0,
},
{
.id = QCA6174_HW_3_0_VERSION,
@@ -148,6 +152,7 @@
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
+ .spectral_bin_discard = 0,
},
{
.id = QCA6174_HW_3_2_VERSION,
@@ -170,6 +175,7 @@
.hw_clk = qca6174_clk,
.target_cpu_freq = 176000000,
.decap_align_bytes = 4,
+ .spectral_bin_discard = 0,
},
{
.id = QCA99X0_HW_2_0_DEV_VERSION,
@@ -195,6 +201,7 @@
.sw_decrypt_mcast_mgmt = true,
.hw_ops = &qca99x0_ops,
.decap_align_bytes = 1,
+ .spectral_bin_discard = 4,
},
{
.id = QCA9984_HW_1_0_DEV_VERSION,
@@ -221,6 +228,7 @@
.sw_decrypt_mcast_mgmt = true,
.hw_ops = &qca99x0_ops,
.decap_align_bytes = 1,
+ .spectral_bin_discard = 12,
},
{
.id = QCA9888_HW_2_0_DEV_VERSION,
@@ -246,6 +254,7 @@
.sw_decrypt_mcast_mgmt = true,
.hw_ops = &qca99x0_ops,
.decap_align_bytes = 1,
+ .spectral_bin_discard = 12,
},
{
.id = QCA9377_HW_1_0_DEV_VERSION,
@@ -265,6 +274,7 @@
},
.hw_ops = &qca988x_ops,
.decap_align_bytes = 4,
+ .spectral_bin_discard = 0,
},
{
.id = QCA9377_HW_1_1_DEV_VERSION,
@@ -286,6 +296,7 @@
.hw_clk = qca6174_clk,
.target_cpu_freq = 176000000,
.decap_align_bytes = 4,
+ .spectral_bin_discard = 0,
},
{
.id = QCA4019_HW_1_0_DEV_VERSION,
@@ -312,6 +323,7 @@
.sw_decrypt_mcast_mgmt = true,
.hw_ops = &qca99x0_ops,
.decap_align_bytes = 1,
+ .spectral_bin_discard = 4,
},
};
@@ -447,6 +447,9 @@ struct ath10k_hw_params {
/* hw specific clock control parameters */
const struct ath10k_hw_clk_params *hw_clk;
int target_cpu_freq;
+
+ /* Number of bytes to be discarded for each FFT sample */
+ int spectral_bin_discard;
};
struct htt_rx_desc;
@@ -56,6 +56,21 @@ static uint8_t get_max_exp(s8 max_index, u16 max_magnitude, size_t bin_len,
return max_exp;
}
+static inline size_t ath10k_spectral_fix_bin_size(struct ath10k *ar,
+ size_t bin_len)
+{
+ /* some chipsets reports bin size as 2^n bytes + 'm' bytes in
+ * report mode 2. First 2^n bytes carries inband tones and last
+ * 'm' bytes carries band edge detection data mainly used in
+ * radar detection purpose. Strip last 'm' bytes to make bin size
+ * as a valid one. 'm' can take possible values of 4, 12.
+ */
+ if (!is_power_of_2(bin_len))
+ bin_len -= ar->hw_params.spectral_bin_discard;
+
+ return bin_len;
+}
+
int ath10k_spectral_process_fft(struct ath10k *ar,
struct wmi_phyerr_ev_arg *phyerr,
const struct phyerr_fft_report *fftr,
@@ -70,17 +85,11 @@ int ath10k_spectral_process_fft(struct ath10k *ar,
fft_sample = (struct fft_sample_ath10k *)&buf;
+ bin_len = ath10k_spectral_fix_bin_size(ar, bin_len);
+
if (bin_len < 64 || bin_len > SPECTRAL_ATH10K_MAX_NUM_BINS)
return -EINVAL;
- /* qca99x0 reports bin size as 68 bytes (64 bytes + 4 bytes) in
- * report mode 2. First 64 bytes carries inband tones (-32 to +31)
- * and last 4 byte carries band edge detection data (+32) mainly
- * used in radar detection purpose. Strip last 4 byte to make bin
- * size is valid one.
- */
- if (bin_len == 68)
- bin_len -= 4;
reg0 = __le32_to_cpu(fftr->reg0);
reg1 = __le32_to_cpu(fftr->reg1);